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2 Megabit (256K x 8) Multi-Purpose Flash

SST39SF020

Preliminary Specifications

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© 1998 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF is a trademark of Silicon storage Technology, Inc.

326-10 12/98

These specifications are subject to change without notice.

FEATURES:

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Organized as 256 K X 8

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Single 5.0V Read and Write Operations

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Superior Reliability

– Endurance: 100,000 Cycles (typical)

– Greater than 100 years Data Retention

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Low Power Consumption:

– Active Current: 20 mA (typical)

– Standby Current: 10 µA (typical)

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Sector Erase Capability

– Uniform 4 KByte sectors

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Fast Read Access Time:

– 70 and 90 ns

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Latched Address and Data

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Fast Sector Erase and Byte Program:

– Sector Erase Time: 7 ms (typical)

– Chip Erase Time: 15 ms (typical)

– Byte Program time: 20 µs (typical)

– Chip Rewrite Time: 5 seconds (typical)

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Automatic Write Timing

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End of Write Detection

– Toggle Bit

– Data# Polling

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TTL I/O Compatibility

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JEDEC Standard

– EEPROM Pinouts and command set

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Packages Available

– 32-Pin PDIP

– 32-Pin PLCC

– 32-Pin TSOP (8mm x 14mm)

PRODUCT DESCRIPTION

The SST39SF020 is a 256K x 8 CMOS Multi-Purpose

Flash (MPF) manufactured with SST’s proprietary, high

performance CMOS SuperFlash technology. The split

gate cell design and thick oxide tunneling injector attain

better reliability and manufacturability compared with

alternate approaches. The SST39SF020 device writes

(Program or Erase) with a 5.0V-only power supply. The

SST39SF020 device conforms to JEDEC standard

pinouts for x8 memories.

Featuring high performance byte program, the

SST39SF020 device provides a maximum byte-pro-

gram time of 30 µsec. The entire memory can be erased

and programmed byte by byte typically in 5 seconds,

when using interface features such as Toggle Bit or

Data# Polling to indicate the completion of Program

operation. To protect against inadvertent write, the

SST39SF020 device has on-chip hardware and soft-

ware data protection schemes. Designed, manufac-

tured, and tested for a wide spectrum of applications, the

SST39SF020 device is offered with a guaranteed endur-

ance of 10,000 cycles. Data retention is rated at greater

than 100 years.

The SST39SF020 device is suited for applications that

require convenient and economical updating of program,

configuration, or data memory. For all system applica-

tions, the SST39SF020 device significantly improves

performance and reliability, while lowering power

consumption. The SST39SF020 inherently uses less

energy during erase and program than alternative flash

technologies. The total energy consumed is a function of

the applied voltage, current, and time of application.

Since for any given voltage range, the SuperFlash tech-

nology uses less current to program and has a shorter

erase time, the total energy consumed during any Erase

or Program operation is less than alternative flash tech-

nologies. The SST39SF020 device also improves flex-

ibility while lowering the cost for program, data, and

configuration storage applications.

The SuperFlash technology provides fixed Erase and

Program times, independent of the number of endurance

cycles that have occurred. Therefore the system soft-

ware or hardware does not have to be modified or de-

rated as is necessary with alternative flash technologies,

whose erase and program times increase with accumu-

lated endurance cycles.

To meet high density, surface mount requirements, the

SST39SF020 device is offered in 32-pin TSOP and 32-

pin PLCC packages. A 600 mil, 32-pin PDIP is also

available. See Figures 1 and 2 for pinouts.

Device Operation

Commands are used to initiate the memory operation

functions of the device. Commands are written to the

device using standard microprocessor write sequences.

A command is written by asserting WE# low while