UCC27323, UCC27324, UCC27325

UCC37323, UCC37324, UCC37325

SLUS492B – JUNE 2001 – REVISED SEPTEMBER 2002

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APPLICATION INFORMATION

The switching load presented by a power MOSFET can be converted to an equivalent capacitance by examining

the gate charge required to switch the device. This gate charge includes the effects of the input capacitance

plus the added charge needed to swing the drain of the device between the ON and OFF states. Most

manufacturers provide specifications that provide the typical and maximum gate charge, in nC, to switch the

device under specified conditions. Using the gate charge Qg, one can determine the power that must be

dissipated when charging a capacitor. This is done by using the equivalence Qg = CeffV to provide the following

equation for power:

P

+ C

V2

f

+ Qg f

This equation allows a power designer to calculate the bias power required to drive a specific MOSFET gate

at a specific bias voltage.

THERMAL INFORMATION

The useful range of a driver is greatly affected by the drive power requirements of the load and the thermal

characteristics of the IC package. In order for a power driver to be useful over a particular temperature range

the package must allow for the efficient removal of the heat produced while keeping the junction temperature

within rated limits. The UCC37323/4/5 family of drivers is available in three different packages to cover a range

of application requirements.

As shown in the power dissipation rating table, the SOIC-8 (D) and PDIP-8 (P) packages each have a power

given in the table. Note that the power dissipation in our earlier example is 0.432 W with a 10-nF load, 12 VDD,

switched at 300 kHz. Thus, only one load of this size could be driven using the D or P package, even if the two

onboard drivers are paralleled. The difficulties with heat removal limit the drive available in the older packages.

The MSOP PowerPAD-8 (DGN) package significantly relieves this concern by offering an effective means of

removing the heat from the semiconductor junction. As illustrated in Reference 2, the PowerPAD packages offer

a leadframe die pad that is exposed at the base of the package. This pad is soldered to the copper on the PC

board directly underneath the IC package, reducing the

Θjc down to 4.7°C/W. Data is presented in Reference 2

to show that the power dissipation can be quadrupled in the PowerPAD configuration when compared to the

standard packages. The PC board must be designed with thermal lands and thermal vias to complete the heat

removal subsystem, as summarized in Reference 3. This allows a significant improvement in heatsinking over

that available in the D or P packages, and is shown to more than double the power capability of the D and P

packages.

references

1.

Power Supply Seminar SEM–1400 Topic 2: Design And Application Guide For High Speed MOSFET

Gate Drive Circuits, by Laszlo Balogh, Texas Instruments Literature No. SLUP133.

2.

Application Note, Practical Considerations in High Performance MOSFET, IGBT and MCT Gate Drive

Circuits, by Bill Andreycak, Texas Instruments Literature No. SLUA105

3.

Technical Brief, PowerPad Thermally Enhanced Package, Texas Instruments Literature No. SLMA002

4.

Application Brief, PowerPAD Made Easy, Texas Instruments Literature No. SLMA004