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UCC37325D Datasheet(PDF) 2 Page - Texas Instruments |
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UCC37325D Datasheet(HTML) 2 Page - Texas Instruments |
2 / 15 page UCC27323, UCC27324, UCC27325 UCC37323, UCC37324, UCC37325 SLUS492B – JUNE 2001 – REVISED SEPTEMBER 2002 2 www.ti.com ORDERING INFORMATION OUTPUT TEMPERATURE RANGE PACKAGED DEVICES OUTPUT CONFIGURATION TEMPERATURE RANGE TA = TJ SOIC-8 (D) MSOP-8 PowerPAD (DGN) } PDIP-8 (P) Dual inverting –40 °C to +85°C UCC27323D UCC27323DGN UCC27323P Dual inverting 0 °C to +70°C UCC37323D UCC37323DGN UCC37323P D al nonIn erting –40 °C to +85°C UCC27324D UCC27324DGN UCC27324P Dual nonInverting 0 °C to +70°C UCC37324D UCC37324DGN UCC37324P One inverting, –40 °C to +85°C UCC27325D UCC27325DGN UCC27325P One inverting, one noninverting 0 °C to +70°C UCC37325D UCC37325DGN UCC37325P † D (SOIC–8) and DGN (PowerPAD–MSOP) packages are available taped and reeled. Add R suffix to device type (e.g. UCC27323DR, UCC27324DGNR) to order quantities of 2,500 devices per reel for D or 1,000 devices per reel for DGN package. ‡ The PowerPAD is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which is the ground of the device. D, DGN, OR P PACKAGE (TOP VIEW) VDD OUTA N/A OUTB INA N/A GND INB 1 2 3 4 8 7 6 5 D, DGN, OR P PACKAGE (TOP VIEW) VDD OUTA N/A OUTB INA N/A GND INB 1 2 3 4 8 7 6 5 D, DGN, OR P PACKAGE (TOP VIEW) VDD OUTA N/A OUTB INA N/A GND INB 1 2 3 4 8 7 6 5 (DUAL INVERTING) (DUAL NONINVERTING) (ONE INVERTING, ONE NONINVERTING) power dissipation rating table PACKAGE SUFFIX Θjc (°C/W) Θja (°C/W) Power Rating (mW) TA = 70°C See Note 1 Derating Factor Above 70 °C (mW/ C) See Note 1 SOIC-8 D 42 84 – 160 } 344–655 See Note 2 6.25 – 11.9 See Note 2 PDIP-8 P 49 110 500 9 MSOP PowerPAD-8 See Note 3 DGN 4.7 50 – 59 } 1370 17.1 Notes: 1. 125 °C operating junction temperature is used for power rating calculations 2. The range of values indicates the effect of pc–board. These values are intended to give the system designer an indication of the best and worst case conditions. In general, the system designer should attempt to use larger traces on the pc–board where possible in order to spread the heat away form the device more effectively. For information on the PowerPAD t package, refer to Technical Brief, PowerPad Thermally Enhanced Package, Texas Instrument s Literature No. SLMA002 and Application Brief, PowerPad Made Easy, Texas Instruments Literature No. SLMA004. 3. The PowerPAD is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate which is the ground of the device. Table 1. Input/Output Table INPUTS (VIN_L, VIN_H) UCC37323 UCC37324 UCC37325 INA INB OUTA OUTB OUTA OUTB OUTA OUTB L L H H L L H L L H H L L H H H H L L H H L L L H H L L H H L H |
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