Philips Semiconductors

Product data

PCA9550

programmable blink rates

2

2003 May 02

FEATURES

cycle) between 0.15625 and 40 Hz (6.4 and 0.025 seconds)

GPIOs

150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101

exceeds 100 mA

DESCRIPTION

applications where it is necessary to limit bus traffic or free up the

of this device is the internal oscillator with two programmable blink

rates. To blink LEDs using normal I/O Expanders like the PCF8574

or PCA9554, the bus master must send repeated commands to turn

the LED on and off. This greatly increases the amount of traffic on

LED Blinker instead requires only the initial set up command to

program BLINK RATE 1 and BLINK RATE 2 (i.e., the frequency and

duty cycle). From then on, only one command from the bus master

is required to turn each individual open drain output ON, OFF, or to

cycle at BLINK RATE 1 or BLINK RATE 2. Maximum output sink

current is 25 mA per bit and 50 mA per package.

Any bits not used for controlling the LEDs can be used for General

Purpose Parallel Input/Output (GPIO) expansion.

The active-LOW hardware reset pin (RESET) and Power On Reset

(POR) initializes the registers to their default state, all zeroes,

causing the bits to be set HIGH (LED off).

One hardware address pin on the PCA9550 allows two devices to

operate on the same bus.

PIN CONFIGURATION

1

2

3

45

6

7

8

A0

LED0

LED1

SDA

SCL

RESET

SW00926

Figure 1. Pin configuration

PIN DESCRIPTION

PIN

NUMBER

SYMBOL

FUNCTION

1

A0

Address input 0

2

LED0

LED driver 0

3

LED1

LED driver 1

4

Supply ground

5

RESET

Active-LOW reset input

6

SCL

Serial clock line

7

SDA

Serial data line

8

Supply voltage

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

TOPSIDE MARK

DRAWING NUMBER

8-Pin Plastic SO

-40 to +85

°C

PCA9550D

PCA9550

SOT96-1

8-Pin Plastic TSSOP

-40 to +85

°C

PCA9550DP

9550

SOT505-1

Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.