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ADM1260ACPZ-RL7 Datasheet(PDF) 7 Page - Analog Devices |
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ADM1260ACPZ-RL7 Datasheet(HTML) 7 Page - Analog Devices |
7 / 71 page Data Sheet ADM1260 Rev. 0 | Page 7 of 71 Parameter Min Typ Max Unit Test Conditions/Comments Standard (Digital Output) Mode (PDO1 to PDO10) VOH 2.4 V Pull-up resistor to VDDCAP or VPx (VPU) = 2.7 V, IOH = 0.5 mA 4.5 V VPU to VPx = 6.0 V, IOH = 0 mA VPU − 0.3 V VPU ≤ 2.7 V, IOH = 0.5 mA Output Voltage When PDOx is Low (VOL) 0 0.50 V IOL = 20 mA Output Sink Current When PDOx is Low (IOL2) 20 mA Maximum sink current per PDOx pin Total Sink Current of PDOx Pins (ISINK2) 60 mA Maximum total sink for all PDOx pins RPULL-UP 16 20 29 kΩ Internal pull-up resistor Maximum Current Drawn from VPx When PDOx is Internally Pulled Up to VPx (ISOURCE)2 2 mA Current load on any VPx pull-up resistors, that is, the total source current available through any number of the PDOx pull-up switches configured onto any one VPx pin Three-State Output Leakage Current 10 μA VPDO = 14.4 V Oscillator Frequency 90 100 110 kHz All on-chip time delays are derived from this clock DIGITAL INPUTS (VXx, A0, A1) Input Voltage High, VIH 2.0 V Maximum VIN = 5.5 V Low, VIL 0.8 V Maximum VIN = 5.5 V Input Current High, IIH −1 μA VIN = 5.5 V Low, IIL 1 μA VIN = 0 V Input Capacitance 5 pF Programmable Pull-Down Current, IPULL-DOWN 20 μA VDDCAP = 4.75 V, TA = 25°C, if known logic state is required SERIAL BUS, ICB DIGITAL INPUTS/ OUTPUT (SDA, SCL, CDA, CCL) Input Voltage High, VIH 2.0 V Low, VIL 0.8 V Input Low Current, IIL 1 μA VIN = 0 V Output Low Voltage, VOL2 0.4 V IOUT = −3.0 mA CDA, CCL Input Glitch Filter, tSP 50 ns CDA, CCL Output Low Current, IOL 5 mA VOL = 0.4 V SDA, SCL SERIAL BUS TIMING3 See Figure 40 Clock Frequency, fSCLK 400 kHz Bus Free Time, tBUF 1.3 μs Start Setup Time, tSU;STA 0.6 μs Stop Setup Time, tSU;STO 0.6 μs Start Hold Time, tHD;STA 0.6 μs SCL Low Time, tLOW 1.3 μs SCL High Time, tHIGH 0.6 μs SCL, SDA Rise Time, tR 300 ns SCL, SDA Fall Time, tF 300 ns Data Setup Time, tSU;DAT 100 ns Data Hold Time, tHD;DAT 250 ns CDA, CCL SERIAL BUS3 Clock Frequency, fSCLK 400 kHz Bus Capacitance 240 pF IOL = 5mA Pin Capacitance 10 pF |
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