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IS67WVE4M16BLL Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS67WVE4M16BLL Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 32 page 1 IS66WVE4M16EALL/BLL/CLL IS67WVE4M16EALL/BLL/CLL Rev.0B | November 2014 www.issi.com - SRAM@issi.com Overview The IS66/67WVE4M16EALL/BLL/CLL is an integrated memory device containing 64Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as 4M words by 16 bits. The device includes several power saving modes : Partial Array Refresh mode where data is retained in a portion of the array and Deep Power Down mode. Both these modes reduce standby current drain. The die has separate power rails, VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core. Asynchronous and page mode interface Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V Page mode read access Interpage Read access : 55ns, 70ns Intrapage Read access : 20ns Low Power Consumption Asynchronous Operation < 30 mA Intrapage Read < 23mA Standby < 200 uA (max.) Deep power-down (DPD) ALL/CLL: < 3µA (Typ) BLL: < 10µA (Typ) Low Power Feature Temperature Controlled Refresh Partial Array Refresh Deep power-down (DPD) mode Operating temperature Range Industrial: -40°C~85°C Automotive A1: -40°C~85°C Packages: 48-ball TFBGA 64Mb Async/Page PSRAM Features Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Notes: 1. The 48-pin TSOP-I package option is not yet available. Please contact SRAM Marketing at sram@issi.com for additional information. PRELIMINARY INFORMATION |
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