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IS61QDP2B42M18A2 Datasheet(PDF) 6 Page - Integrated Silicon Solution, Inc |
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IS61QDP2B42M18A2 Datasheet(HTML) 6 Page - Integrated Silicon Solution, Inc |
6 / 33 page IS61QDP2B42M18A/A1/A2 IS61QDP2B41M36A/A1/A2 Integrated Silicon Solution, Inc.- www.issi.com Rev. B 12/15/2014 6 ODT (On Die Termination) On Die Termination (ODT) is a feature that allows a SRAM to change input resistive termination condition by ODT pin which function can have three status, High, Low, and Floating. Each status can have different ODT termination value that tracks the value of RQ (Refer to the table of Fig1) and ODT of QUADP is always turned on during the read and write function after ODT level to connect with ODT resistor is forced. Fig1. Functional representation of ODT Notes 1. Allowable range of RQ to guarantee impedance matching a tolerance of ±20% is 175 Ω<RQ<350Ω. 2. Allowable range of RQ to guarantee impedance matching a tolerance of ±20% is 175 Ω<RQ<250Ω. 3. ODT control pin is connected to VDDQ through 3.5k Ω. Therefore it is recommended to connect it to VSS through less than 100 Ω to make it low. 4. ODT control pin is connected to VSS through 3.5k Ω. Therefore it is recommended to connect it to VDDQ through less than 100 Ω to make it high. ODT PIN For option1 case, low input level of ODT pin can select strong (RQ 1) input termination range (175Ω<RQ<350Ω) and high input level of ODT pin can select weak (RQ 2) input termination range (175Ω<RQ<250Ω) with K, K#, D0 to Dn, BWx# and if ODT pin is on floating condition, it set weak (RQ 2) input termination range which ODT pin is connected by pull-up resistor internally. For option2 case, high input level of ODT pin can select weak (RQ 2) input termination range (175 Ω<RQ<250Ω) with D0 to Dn, BWx# and low input level or floating of ODT pin can select disable of the ODT function. R1 R2 R3 Option1 3 0.3x RQ 1 0.6x RQ 2 0.6x RQ 2 Option2 4 ODT disable 0.6x RQ 2 ODT disable PAD ODT=L ODT=L ODT=H ODT=H ODT=Floating ODT=Floating VDDQ VSS VDDQ VSS VDDQ VSS R1x2 R1x2 R2x2 R2x2 R3x2 R3x2 |
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