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PI3VDP1430 Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation |
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PI3VDP1430 Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation |
2 / 20 page PI3HDX412BD 3.4Gbps HDMI 1.4b 1:2 Splitter/Demux with Equalization & Pre-emphasis 2 www.pericom.com 03/24/14 All trademarks are property of their respective owners. TMDS In/Out Pin Assignment Pin # Pin Name Type Description 4 D2P I Input Port. TMDS Clock and Data Input pins. When Input Termination Resistor (Rt = 50 Ohm) tied to VDD or GND, Rpd=200 kOhm shall be "OFF" state. I2C registers can control Rt and Rpd ON/OFF state. 5 D2N I 7 D1P I 8 D1N I 9 D0P I 10 D0N I 12 CLKP I 13 CLKN I 25 CLKN2 O Output Port 1. TMDS Clock and Data Output pins. ROUT_SEL pin en- ables Output Termination Resistor (Rout=50 Ohm). 26 CLKP2 O 28 D0N2 O 29 D0P2 O 31 D1N2 O 32 D1P2 O 34 D2N2 O 35 D2P2 O 37 CLKN1 O Output Port 2. TMDS Clock and Data Output pins. ROUT_SEL pin en- ables Output Termination Resistor (Rout=50 Ohm). 38 CLKP1 O 40 D0N1 O 41 D0P1 O 43 D1N1 O 44 D1P1 O 46 D2N1 O 47 D2P1 O Note: In TMDS Data and Clock Differential Pair, the polarity +/- (or P/N) of each pair can use interchangeably. When input TMDS Input Clock polarity +/- pin swaps, output TMDS Clock of port 1 and port 2 shall swapped accordingly. 14-0020 |
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