IS42VS16400L datasheet(9/56 Pages) ISSI

Part #	IS42VS16400L

Description	Internal bank for hiding row access/precharge

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Manufacturer	ISSI [Integrated Silicon Solution, Inc]

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Integrated Silicon Solution, Inc. — www.issi.com

9

Rev. 00A

04/10/2012

IS42VS16400L

IS45VS16400L

3.Currentstatedefinitions:

Idle:Thebankhasbeenprecharged,andtrphasbeenmet.

RowActive:Arowinthebankhasbeenactivated,andtrcdhasbeenmet.Nodatabursts/accessesandnoregister

accessesareinprogress.

Read:AREADbursthasbeeninitiated,withautoprechargedisabled,andhasnotyetterminatedorbeentermi-

nated.

Write:AWRITEbursthasbeeninitiated,withautoprechargedisabled,andhasnotyetterminatedorbeentermi-

nated.

4.Thefollowingstatesmustnotbeinterruptedbyacommandissuedtothesamebank.COMMANDINHIBITorNOPcommands,

orallowablecommandstotheotherbankshouldbeissuedonanyclockedgeoccurringduringthesestates.Allowablecom-

mandstotheotherbankaredeterminedbyitscurrentstateandCURRENTSTATEBANKntruthtables.

Precharging:StartswithregistrationofaPRECHARGEcommandandendswhentrpismet.Oncetrpismet,thebank

willbeintheidlestate.

RowActivating:StartswithregistrationofanACTIVEcommandandendswhentrcdismet.Oncetrcdismet,thebankwill

beintherowactivestate.

Readw/Auto

PrechargeEnabled:StartswithregistrationofaREADcommandwithautoprechargeenabledandendswhentrphasbeen

met.Oncetrpismet,thebankwillbeintheidlestate.

Writew/Auto

PrechargeEnabled:StartswithregistrationofaWRITEcommandwithautoprechargeenabledandendswhentrphasbeen

met.Oncetrpismet,thebankwillbeintheidlestate.

5.Thefollowingstatesmustnotbeinterruptedbyanyexecutablecommand;COMMANDINHIBITorNOPcommandsmustbe

appliedoneachpositiveclockedgeduringthesestates.

Refreshing:StartswithregistrationofanAUTOREFRESHcommandandendswhentrcismet.Oncetrcismet,the

SDRAMwillbeintheallbanksidlestate.

AccessingMode

Register:StartswithregistrationofaLOADMODEREGISTERcommandandendswhentmrdhasbeenmet.Once

tmrdismet,theSDRAMwillbeintheallbanksidlestate.

PrechargingAll:StartswithregistrationofaPRECHARGEALLcommandandendswhentrpismet.Oncetrpismet,all

bankswillbeintheidlestate.

6.Allstatesandsequencesnotshownareillegalorreserved.

7.Notbank-specific;requiresthatallbanksareidle.

8.Mayormaynotbebank-specific;ifallbanksaretobeprecharged,allmustbeinavalidstateforprecharging.

9.Notbank-specific;BURSTTERMINATEaffectsthemostrecentREADorWRITEburst,regardlessofbank.

10.READsorWRITEslistedintheCommand(Action)columnincludeREADsorWRITEswithautoprechargeenabledand

READsorWRITEswithautoprechargedisabled.

11.DoesnotaffectthestateofthebankandactsasaNOPtothatbank.

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