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IS45R83200D Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS45R83200D Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 62 page IS42R83200D, IS42R16160D IS45R83200D, IS45R16160D Integrated Silicon Solution, Inc. — www.issi.com 1 Rev. A 03/02/2010 Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with- out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. FEATURES • Clockfrequency:133,100MHz • Fullysynchronous;allsignalsreferencedtoa positive clock edge • Internalbankforhidingrowaccess/precharge • SinglePowersupply:2.5V+0.2V • LVTTLinterface • Programmableburstlength – (1, 2, 4, 8, full page) • Programmableburstsequence: Sequential/Interleave • AutoRefresh(CBR) • SelfRefresh • 8Krefreshcyclesevery16ms(A2grade)or 64 ms (commercial, industrial, A1 grade) • Randomcolumnaddresseveryclockcycle • ProgrammableCAS latency (2, 3 clocks) • Burstread/writeandburstread/singlewrite operations capability • Burstterminationbyburststopandprecharge command OPTIONS • Package: 54-pinTSOP-II(x8andx16) 54-ballBGA(x16only) • OperatingTemperatureRange: Commercial (0oC to +70oC) Industrial (-40oCto+85oC) AutomotiveGradeA1(-40oCto+85oC) AutomotiveGradeA2(-40oCto+105oC) OVERVIEW ISSI's256MbSynchronousDRAMachieveshigh-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The256MbSDRAMisorganizedasfollows. 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM MARCH 2010 KEY TIMING PARAMETERS Parameter -75 Unit ClkCycleTime CAS Latency=3 7.5 ns CAS Latency=2 10 ns ClkFrequency CAS Latency=3 133 Mhz CAS Latency=2 100 Mhz AccessTimefromClock CAS Latency=3 5.4 ns CAS Latency=2 6 ns IS42/45R83200D IS42/45R16160D 8Mx8x4Banks 4Mx16x4Banks 54-pinTSOPII 54-pinTSOPII 54-ballBGA Parameter 32M x 8 16M x 16 Configuration 8M x 8 x 4 banks 4M x 16 x 4 banks Refresh Count Com./Ind. A1 A2 8K/64ms 8K/64ms 8K/16ms 8K/64ms 8K/64ms 8K/16ms Row Addresses A0-A12 A0-A12 Column Addresses A0-A9 A0-A8 Bank Address Pins BA0, BA1 BA0, BA1 Auto Precharge Pins A10/AP A10/AP ADDRESS TABLE |
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