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IS25WD020-JNLA Datasheet(PDF) 4 Page - Integrated Silicon Solution, Inc

Part # IS25WD020-JNLA
Description  2 Mbit / 4 Mbit Single Operating Voltage Serial Flash Memory
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25WD020-JNLA Datasheet(HTML) 4 Page - Integrated Silicon Solution, Inc

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IS25WD020/040
Integrated Silicon Solution, Inc.- www.issi.com
Rev. F
07/31/2013
4
SPI MODES DESCRIPTION
Multiple IS25WD020/040 devices can be connected on
the SPI serial bus and controlled by a SPI Master, i.e.
microcontroller, as shown in Figure 1. The devices
support either of two SPI modes:
Mode 0 (0, 0)
Mode 3 (1, 1)
The difference between these two modes is the clock
polarity when the SPI master is in Stand-by mode: the
serial clock remains at “0” (SCK = 0) for Mode 0 and
the clock remains at “1” (SCK = 1) for Mode 3. Please
refer to Figure 2. For both modes, the input data is
latched on the rising edge of Serial Clock (SCK), and
the output data is available from the falling edge of
SCK.
Figure 1. Connection Diagram among SPI Master and SPI Slaves (Memory Devices)
SPI Master
(i.e. Microcontroller)
CS3
CS2
CS1
SPI Memory
Device
SPI Memory
Devic
e
SPI Memory
Device
SPI Interface with
(0,0) or (1,1)
SDIO
SDI
SCK
SCK
SCK
SCK
SO
SO
SO
SIO
SIO
SIO
CE#
CE#
CE#
WP#
WP#
WP#
HOLD#
HOLD#
HOLD#
Note: 1. The Write Protect (WP#) and Hold (HOLD#) signals should be driven high or low as
appropriate.


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