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TMS320C5535AZHH10 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C5535AZHH10 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 156 page PLL/Clock Generator Power Management Pin Multiplexing JTAG Interface 64KB DARAM 128KB ROM Switched Central Resource (SCR) Input Clocks C55x DSP CPU DSP System Peripherals I S (x4) 2 I C 2 SPI UART Serial Interfaces DMA (x4) Interconnect Program/Data Storage eMMC/SD SDHC (x2) No SARAM TMS320C5532 TMS320C5533 TMS320C5534 TMS320C5535 64KB SARAM 192KB SARAM 256KB SARAM FFT Hardware Accelerator TMS320C5534 USB 2.0 PHY (HS) [DEVICE] Connectivity TMS320C5533 Not Applicable TMS320C5532 TMS320C5535 10-Bit SAR ADC Application Specific LCD Bridge Display GP Timer (x2) RTC GP Timer or WD System USB_LDO DSP_LDO TMS320C5533 TMS320C5532 TMS320C5535/C5534 ANA_LDO TMS320C5535, TMS320C5534, TMS320C5533, TMS320C5532 SPRS737C – AUGUST 2011 – REVISED APRIL 2014 www.ti.com 1.4 Functional Block Diagram Figure 1-1 shows the functional block diagram of the devices. Figure 1-1. Functional Block Diagram 4 Device Overview Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320C5535 TMS320C5534 TMS320C5533 TMS320C5532 |
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