TT6297/TT6298

07’/06/20

Page 8 of 19

Ver :1.0

FUNCTION EXPLANATION

1. Phrase Selection

bus. The phrase selection data is latched when WRB goes high while CSB is low .The format of the

phrase specification input is as follows.

first data byte specifies the low phrase address and the I7,I6 of second byte are used as

high phrase address. The phrase selection data has a selection of 511 phrases which

address outputs, and they specify both start and stop address which are stored in the

external ROM.

Relation between Phrase Selection Data and ROM Address

Phrase

Selection

Data

-

-

-

External ROM

address

Selection

Not valid

Phrase 1

Phrase 2

Phrase 3

Phrase 510

Phrase 511

0~0

0~0

0~0

0~0

0~0

0~0

0

0

0

0

1

1

0

0

0

0

1

1

0

0

0

0

1

1

0

0

0

0

1

1

0

0

0

0

1

1

0

0

0

0

1

1

0

0

0

0

1

1

0

0

1

1

1

1

0

1

0

1

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

* Phrases can not be specified with all inputs = “0”

1st Byte

1

Phrase selection data

2nd Byte

Phrase expansion

II6,II7 &

Channel specification II4,II5

Reduction specification

II3~II0