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TPS74701 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS74701 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 30 page TPS74701 www.ti.com SBVS099G – NOVEMBER 2007 – REVISED OCTOBER 2015 6.4 Thermal Information TPS74701 THERMAL METRIC(1)(2) DRC (VSON)(3) UNIT 10 PINS RθJA Junction-to-ambient thermal resistance 41.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 78 °C/W RθJB Junction-to-board thermal resistance N/A °C/W ψJT Junction-to-top characterization parameter 0.7 °C/W ψJB Junction-to-board characterization parameter 11.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 6.6 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. (2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator. (3) Thermal data for the DRC package are derived by thermal simulations based on JEDEC-standard methodology as specified in the JESD51 series. The following assumptions are used in the simulations: (a) The exposed pad is connected to the PCB ground layer through a 3×2 thermal via array. (b) The top and bottom copper layers are assumed to have a 20% thermal conductivity of copper representing a 20% copper coverage. (c) This data were generated with only a single device at the center of a JEDEC high-K (2s2p) board with 3-inches × 3-inches copper area. To understand the effects of the copper area on thermal performance, see the Power Dissipation and Estimating Junction Temperature sections. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPS74701 |
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