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ADC08031 Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. ADC08031
Description  8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options,
Voltage Reference, and Track/Hold Function
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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 4 page
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Electrical Characteristics (Continued)
The following specifications apply for V
CC = VREF = +5 VDC, and fCLK = 1 MHz unless otherwise specified. Boldface limits
apply for T
A = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C.
Symbol
Parameter
Conditions
ADC08031, ADC08034 and
ADC08038
Units (Limits)
Typical (Note
8)
Limits (Note 9)
DIGITAL AND DC CHARACTERISTICS
V
OUT(0)
Logical “0” Output Voltage
V
CC = 4.75V
0.4
V (max)
I
OUT = 1.6 mA
I
OUT
TRI-STATE® Output Current
V
OUT = 0V
−3.0
µA (max)
V
OUT = 5V
3.0
µA (max)
I
SOURCE
Output Source Current
V
OUT = 0V
−6.5
mA (min)
I
SINK
Output Sink Current
V
OUT = VCC
8.0
mA (min)
I
CC
Supply Current
ADC08031, ADC08034, and
ADC08038
CS = HIGH
3.0
mA (max)
REFERENCE CHARACTERISTICS
V
REFOUT
Nominal Reference Output
V
REFOUT Option
Available Only on
2.6
V
ADC08034 and
ADC08038
Electrical Characteristics
The following specifications apply for V
CC = VREF = +5 VDC, and tr = tf = 20 ns unless otherwise specified. Boldface limits
apply for T
A = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 8)
(Note 9)
(Limits)
f
CLK
Clock Frequency
10
kHz (min)
1
MHz (max)
Clock Duty Cycle
40
% (min)
(Note 13)
60
% (max)
T
C
Conversion Time (Not Including
f
CLK = 1 MHz
8
1/f
CLK (max)
MUX Addressing Time)
8
µs (max)
t
CA
Acquisition Time
1
2
1/f
CLK(max)
t
SELECT
CLK High while CS is High
50
ns
t
SET-UP
CS Falling Edge or Data Input
25
ns (min)
Valid to CLK Rising Edge
t
HOLD
Data Input Valid after CLK
20
ns (min)
Rising Edge
t
pd1,tpd0
CLK Falling Edge to Output
C
L = 100 pF:
Data Valid (Note 14)
Data MSB First
250
ns (max)
Data LSB First
200
ns (max)
t
1H,t0H
TRI-STATE Delay from Rising Edge
C
L = 10 pF, RL = 10 kΩ
50
ns
of CS to Data Output and SARS Hi-Z
(see TRI-STATE Test Circuits)
C
L = 100 pF, RL = 2kΩ
180
ns (max)
C
IN
Capacitance of Logic Inputs
5
pF
C
OUT
Capacitance of Logic Outputs
5
pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed speci-
fications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance character-
istics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to AGND = DGND = 0VDC, unless otherwise specified.
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