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PI6C20800SIVE Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation |
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PI6C20800SIVE Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation |
2 / 10 page 2 PS8887D 03/29/10 PI6C20800S PCI Express® 1:8 HCSL Clock Buffer Pin Descriptions Pin Name Type Pin # Descriptions SRC_DIV# Input 1 3.3VLVTTLinputforselectinginputfrequencydivideby2, activeLOW. SRC&SRC# Input 4,5 0.7VDifferentialSRCinputfromPI6C410clocksynthesizer OE[0:7] Input 6,7,14,15,35,36, 43,44 3.3VLVTTLinputforenablingoutputs,activeHIGH. OE_INV Input 40 3.3VLVTTLinputforinvertingtheOE,SRC_STOP#and PWRDWN#pins. When0=samestage When1=OE[0:7],SRC_STOP#,PWRDWN#inverted. OUT[0:7]&OUT[0:7]# Output 8,9,12,13,1617, 20,21,29,30,33,34, 37,38,41,42 0.7VDifferentialoutputs PLL/BYPASS# Input 22 3.3VLVTTLinputforselectingfan-outofPLLoperation. SCLK Input 23 SMBuscompatibleSCLOCKinput SDA I/O 24 SMBuscompatibleSDATA IREF Input 46 Externalresistorconnectiontosetthedifferentialoutputcurrent SRC_STOP# Input 27 3.3VLVTTLinputforSRCstop,activeLOW PLL_BW# Input 28 3.3VLVTTLinputforselectingthePLLbandwidth PWRDWN# Input 26 3.3VLVTTLinputforPowerDownoperation,activeLOW LOCK Output 45 3.3VLVTTLoutput,transitionhighwhenPLLlockisachieved (Latchedoutput) VDD Power 2,11,19,31,39 3.3VPowerSupplyforOutputs VSS Ground 3,10,18,25,32 GroundforOutputs VSS_A Ground 47 GroundforPLL VDD_A Power 48 3.3VPowerSupplyforPLL Serial Data Interface (SMBus) PI6C20800SisaslaveonlySMBusdevicethatsupportsindexedblockreadandindexedblockwriteprotocolusingasingle7-bit addressandread/writebitasshownbelow. Address assignment A6 A5 A4 A3 A2 A1 A0 R/W 1 1 0 1 1 1 0 0/1 Data Write Protocol(1) 1bit 7bits 1 1 8bits 1 8bits 1 8bits 1 8bits 1 1bit Start bit Slave Addr W Ack Register offset Ack Byte Count =N Ack Data Byte Offset Ack Data ByteN -1 Ack Stopbit Note: 1. Registeroffsetforindicatingthestartingregisterforindexedblockwriteandindexedblockread.ByteCountinwritemodecannotbe0. 10-0150 |
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