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TPS65263QRHBTQ1 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS65263QRHBTQ1 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 47 page  1 2 3 4 5 6 9 10 11 12 13 14 24 23 22 21 20 19 32 31 30 29 28 27 BST1 PGND1 LX1 VIN V7V PVIN1 BST2 LX2 PVIN2 PVIN3 LX3 Thermal Pad 15 26 7 18 8 BST3 16 17 25 EN1 PGND3 PGND2 EN2 TPS65263-Q1 www.ti.com SLVSCS9C – DECEMBER 2014 – REVISED NOVEMBER 2015 5 Pin Configuration and Functions RHB Package 32-Pin VQFN Top View There is no electric signal down bonded to thermal pad inside IC. Exposed thermal pad must be soldered to PCB for optimal thermal performance. Pin Functions PIN DESCRIPTION NAME NO. EN3 1 Enable for buck3. Float to enable. Can use this pin to adjust the input UVLO of buck3 with a resistor divider. SDA 2 I2C interface data pin; float or connect to GND to disable I2C communication SCL 3 I2C interface clock pin; float or connect to GND to disable I2C communication Analog ground common to buck controllers and other analog circuits. It must be routed separately from high-current AGND 4 power grounds to the (–) terminal of bypass capacitor of input voltage VIN. VOUT2 5 Buck2 output voltage sense pin FB2 6 Feedback Kelvin sensing pin for buck2 output voltage. Connect this pin to buck2 resistor divider. Error amplifier output and loop compensation pin for buck2. Connect a series resistor and capacitor to compensate the COMP2 7 control loop of buck2 with peak current PWM mode. Soft-start and tracking input for buck2. An internal 5.2-µA pullup current source is connected to this pin. The soft-start SS2 8 time can be programmed by connecting a capacitor between this pin and ground. Boot-strapped supply to the high-side floating gate driver in buck2. Connect a capacitor (recommend 47 nF) from BST2 BST2 9 pin to LX2 pin. Switching node connection to the inductor and bootstrap capacitor for buck2. The voltage swing at this pin is from a LX2 10 diode voltage below the ground up to PVIN2 voltage. Power ground connection of buck2. Connect PGND2 pin as close as practical to the (–) terminal of VIN2 input ceramic PGND2 11 capacitor. Input power supply for buck2. Connect PVIN2 pin as close as practical to the (+) terminal of an input ceramic capacitor PVIN2 12 (suggest 10 µF). Input power supply for buck3. Connect PVIN3 pin as close as practical to the (+) terminal of an input ceramic capacitor PVIN3 13 (suggest 10 µF). Power ground connection of buck3. Connect PGND3 pin as close as practical to the (–) terminal of VIN3 input ceramic PGND3 14 capacitor. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS65263-Q1 |
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