Switching Characteristics

Symbol

Parameter

Units

Min

Max

Propagation Delay

14

ns

Propagation Delay

25

ns

Propagation Delay

26

ns

Propagation Delay

30

ns

Functional Description

The ’24 5-bit comparators use combinational circuitry to di-

rectly generate ‘‘A greater than B’’ and ‘‘A less than B’’

outputs As evident from the logic diagram these outputs

are generated in only three gate delays The ‘‘A equals B’’

output is generated in one additional gate delay by decoding

the ‘‘A neither less than nor greater than B’’ condition with a

NOR gate All three outputs are activated by the active LOW

Enable Input (E)

B input permits easy expansion

The A4 and B4 inputs are the most significant inputs and

A0 B0 the least significant Thus if A4 is HIGH and B4 is

inputs except E

Truth Table

Inputs

Outputs

E

HX

X

L

L

L

L

L

L

H

L

L

H

L

L

H

L

L

Logic Symbol

TLF9792 – 2

3