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TPS65023B Datasheet(PDF) 9 Page - Texas Instruments |
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TPS65023B Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 47 page  TPS65023, TPS65023B www.ti.com SLVS670K – JUNE 2006 – REVISED DECEMBER 2015 Electrical Characteristics (continued) VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 3.6 V, VBACKUP = 3 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT CONTROL SIGNALS: LOWBAT, PWRFAIL, RESPWRON, INT, SDAT (OUTPUT) VOH High-level output voltage 6 V VOL Low-level output voltage IIL = 5 mA 0 0.3 V Duration of low pulse at RESPWRON External capacitor 1 nF 100 ms Internal charge / discharge current on pin 1.7 2 2.3 μA ICONST Used for generating RESPWRON delay TRESPWRON Internal lower comparator threshold on 0.225 0.25 0.275 V TRESPWRON_LOWTH Used for generating RESPWRON delay pin TRESPWRON Internal upper comparator threshold on 0.97 1 1.103 V TRESPWRON_UPTH Used for generating RESPWRON delay pin TRESPWRON Resetpwron threshold VRTC falling –3% 2.4 3% V Resetpwron threshold VRTC rising –3% 2.52 3% V ILK Leakage current Output inactive high 0.1 μA VLDO1 AND VLDO2 LOW DROPOUT REGULATORS VI Input voltage range for LDO1, 2 1.5 6.5 V VO(LD01) LDO1 output voltage range 1 3.15 V VO(LDO2) LDO2 output voltage range 1 3.3 V VI = 1.8 V, VO = 1.3 V 200 Maximum output current for LDO1, IO mA LDO2 VI = 1.5 V, VO = 1.3 V 120 LDO1 and LDO2 short-circuit current I(SC) V(LDO1) = GND, V(LDO2) = GND 400 mA limit IO = 50 mA, VINLDO = 1.8 V 120 Minimum voltage drop at LDO1, LDO2 IO = 50 mA, VINLDO = 1.5 V 65 150 mV IO = 200 mA, VINLDO = 1.8 V 300 Output voltage accuracy for LDO1, IO = 10 mA –2% 1% LDO2 VINLDO1, 2 = VLDO1,2 + 0.5 V Line regulation for LDO1, LDO2 –1% 1% (min. 2.5 V) to 6.5 V, IO = 10 mA Load regulation for LDO1, LDO2 IO = 0 mA to 50 mA –1% 1% Regulation time for LDO1, LDO2 Load change from 10% to 90% 10 μs ANALOGIC SIGNALS DEFDCDC1, DEFDCDC2, DEFDCDC3 VIH High-level input voltage 1.3 VCC V VIL Low-level input voltage 0 0.1 V Input bias current 0.001 0.05 μA THERMAL SHUTDOWN T(SD) Thermal shutdown Increasing junction temperature 160 °C Thermal shutdown hysteresis Decreasing junction temperature 20 °C INTERNAL UNDERVOLTAGE LOCK OUT UVLO Internal UVLO VCC falling –2% 2.35 2% V V(UVLO_HYST) Internal UVLO comparator hysteresis 120 mV VOLTAGE DETECTOR COMPARATORS Comparator threshold Falling threshold –1% 1 1% V (PWRFAIL_SNS, LOWBAT_SNS) Hysteresis 40 50 60 mV Propagation delay 25-mV overdrive 10 μs POWER-GOOD VDCDC1, VDCDC2, VDCDC3, VLDO1, V(PGOODF) –12% –10% –8% VLDO2, decreasing VDCDC1, VDCDC2, VDCDC3, VLDO1, V(PGOODR) –7% –5% –3% VLDO2, increasing Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPS65023 TPS65023B |
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