TPS3820-33-Q1, TPS3820-50-Q1, TPS3823-25-Q1

TPS3823-30-Q1, TPS3823-33-Q1, TPS3823-50-Q1, TPS3824-30-Q1, TPS3824-33-Q1

TPS3824-50-Q1, TPS3825-33-Q1, TPS3825-50-Q1, TPS3828-33-Q1, TPS3828-50-Q1

SGLS143C – DECEMBER 2002 – REVISED DECEMBER 2015

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Feature Description (continued)

8.3.3 Push-Pull or Open-Drain Output

All TPS382x-xx-Q1 devices, except for TPS3828-xx-Q1, have push-pull outputs. TPS3828-xx-Q1 devices have

an open-drain output.

8.3.4 Watchdog Timer (WDI)

TPS3820/3/4/8-xx-Q1 devices have a watchdog timer that must be periodically triggered by either a positive or

negative transition at WDI to avoid a reset signal being issued. When the supervising system fails to retrigger the

reinitializes the watchdog timer.

The watchdog timer can be disabled by disconnecting the WDI pin from the system. If the WDI pin detects that it

is in a high-impedance state the TPS3820/3/4/8-xx-Q1 will generate its own WDI pulse to ensure that RESET

does not assert. If this behavior is not desired place a 1-k

Ω resistor from WDI to ground. This resistor will help

ensure that the TPS3820/3/4/8-xx-Q1 detects that WDI is not in a high-impedance state.

In applications where the input to the WDI pin is active (transitioning high and low) when the TPS3820/3/4/8-xx-

application requires that input to WDI be active when the reset signal is asserted, then use a FET to decouple

the WDI signal. An external FET decouples the WDI signal by disconnecting the WDI input when RESET is

asserted. For more details on this, see Decoupling WDI During Reset Event for more details.

8.4 Device Functional Modes

The device functions according to the inputs and outputs in Table 1.

Table 1. Function Table

INPUTS

OUTPUTS

RESET

L

0

L

H

L

1

L

H

H

0

L

H

H

1

H

L

(1)

TPS3820/3/5/8-xx-Q1

(2)

TPS3824/5-xx-Q1

10

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50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1

TPS3828-50-Q1