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SP791EN Datasheet(PDF) 4 Page - Sipex Corporation |
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SP791EN Datasheet(HTML) 4 Page - Sipex Corporation |
4 / 19 page SP791DS/08 SP791 Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation 4 PARAMETER MIN TYP MAX UNITS CONDITIONS WDI Threshold Voltage 0.75 X V CC VV IH (Note 4) 0.8 V IL WDI Input Current -50 -10 µA WDI = 0V 20 50 WDI = V OUT POWER FAIL COMPARATOR PFI Input Threshold 1.20 1.25 1.30 V V CC = 5V PFI Leakage Current +0.01 +25 nA PFO Output Voltage 0.4 V I SINK = 3.2mA 3.5 I SOURCE = 1µA, VCC = 5V PFO Short-Circuit Current 60 mA Output sink current 1 15 100 µA Output source current PFI-to-PFO Delay 15 µs V OD = 15mV 55 V OD = 15mV CHIP-ENABLE GATING CE IN Leakage Current +0.005 +1 µA Disabled mode CE IN-to-CE OUT Resistance 65 150 Ω Enabled mode (Note 5) CE OUT Short-Circuit Current 0.1 0.75 2.0 mA Disabled mode, CE OUT = 0V (Reset Active) CE IN-to-CE OUT Propagation 6 10 ns 50 Ω source impedance driver, Delay (Note 6) C LOAD = 50pF CE OUT Output Voltage High 3.5 V V CC = 5V, IOUT = 100µA (Reset Active) 2.7 V CC = 0V, VBATT = 2.8V, IOUT = 1µA RESET-to-CE OUT Delay 15 µs Power down MANUAL RESET INPUT MR Minimum Pulse Width 25 15 µs MR-to-RESET 7 µs Propagation Delay MR Threshold 1.25 V V CC = 5V MR Pull-Up Current 23 250 µA MR = 0V Note 1: Either V CC or VBATT can go to 0V, if the other is greater than 2.0V. Note 2: The supply current drawn by the SP791 from the battery (excluding I OUT) typically goes to 10µA when (VBATT - 1V) < V CC < VBATT. In most applications, this is a brief period as V CC falls through this region. Note 3: "+" = battery-discharging current, "-" = battery-charging current. Note 4: WDI is internally connected to a voltage divider between V OUT and GND. If unconnected, WDI is driven to 1.6V (typ), disabling the watchdog function. ELECTRICAL CHARACTERISTICS (continued) (Vcc = 4.75V to 5.5V, VBATT = 2.8V, T A = TMIN to TMAX unless otherwise noted, typicals specified at 25 oC) Note 5: The chip-enable resistance is tested with V CC = 4.75V :: V CE IN = VCE OUT =VCC/2. Note 6: The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT. |
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