LM5050-1, LM5050-1-Q1

SNVS629E – MAY 2011 – REVISED DECEMBER 2015

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

–0.3

100

V

–0.3

100

V

VS Pin to Ground

–0.3

100

V

OFF Pin to Ground

–0.3

7

V

Storage Temperature

−65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The GATE pin voltage is typically 12 V above the IN pin voltage when the LM5050-1 is enabled (that is, OFF Pin is Open or Low, and

VIN > VOUT). Therefore, the absolute maximum rating for the IN pin voltage applies only when the LM5050-1 is disabled (that is, OFF

Pin is logic high), or for a momentary surge to that voltage because the Absolute Maximum Rating for the GATE pin is also 100 V

6.2 ESD Ratings: LM5050-1

VALUE

UNIT

±2000

Electrostatic discharge

V

±150

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

The MM is a 200-pF capacitor discharged through a 0-

Ω resistor (that is, directly) into each pin. Applicable test standard is JESD-A115-

A.

6.3 ESD Ratings: LM5050-1-Q1

VALUE

UNIT

±2000

Electrostatic discharge

V

±150

(1)

AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

(2)

The MM is a 200-pF capacitor discharged through a 0-

Ω resistor (that is, directly) into each pin. Applicable test standard is JESD-A115-

A.

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

IN, OUT, VS Pins

5

75

V

OFF Pin

0

5.5

V

Standard Grade

−40

125

°C

LM5050Q0MK-1

−40

150

°C

LM5050Q1MK-1

−40

125

°C

6.5 Thermal Information

LM5050-1/-Q1

DDC (SOT)

UNIT

6 PINS

Junction-to-ambient thermal resistance

180.7

°C/W

Junction-to-case (top) thermal resistance

41.3

°C/W

Junction-to-board thermal resistance

28.2

°C/W

Junction-to-top characterization parameter

0.7

°C/W

Junction-to-board characterization parameter

27.8

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

4

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