SW

VBST

EN

VFB

GND

VO

4

5

6

2

1

7

VIN

SS

VIN

5

VREG

EN

Logic

SW

PGND

Protection

Logic

Ref

SS

UVLO

UVLO

Softstart

SS

REF

TSD

Ref

VREG5

8

VIN

Ceramic

Capacitor

3

SGND

SGND

PGND

SW

PGND

ZC

VREG5

VREG5

Control Logic

1 shot

XCON

8

TPS54428

SLVSB42D – NOVEMBER 2011 – REVISED JANUARY 2016

www.ti.com

Product Folder Links: TPS54428

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Copyright © 2011–2016, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The TPS54428 is a 4-A synchronous step-down (buck) converter with two integrated N-channel MOSFETs. It

operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the output

capacitance required to meet a specific level of performance. Proprietary internal circuitry allows the use of low

ESR output capacitors including ceramic and special polymer types.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 PWM Operation

The main control loop of the TPS54428 is an adaptive on-time pulse width modulation (PWM) controller that

supports a proprietary D-CAP2™ mode control. D-CAP2™ mode control combines constant on-time control with

an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with

both low ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output.

At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one

shot timer expires. This one shot is set by the converter input voltage, VIN, and the output voltage, VO, to

maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The

one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the

reference voltage. An internal ramp is added to reference voltage to simulate output ripple, eliminating the need

for ESR induced output ripple from D-CAP2™ mode control.