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LM2852XMXA-3.3 Datasheet(PDF) 3 Page - Texas Instruments |
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LM2852XMXA-3.3 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 27 page EN SGND SS NC PVIN PVIN SNS NC NC PGND PGND SW SW AVIN LM2852 1 2 3 4 5 7 6 14 13 12 11 10 8 9 LM2852 www.ti.com SNVS325E – JANUARY 2005 – REVISED JANUARY 2016 5 Pin Configuration and Functions PWP Package 14-Pin HTSSOP Top View Pin Functions PIN I/O DESCRIPTION NAME NO. Chip bias input pin. This provides power to the logic of the chip. Connect to the input voltage AVIN 1 I or a separate rail. Enable. Connect this pin to ground to disable the chip; connect to AVIN or leave floating to EN 2 I enable the chip; enable is internally pulled up. Exposed Connect to ground. NC 5, 12, 13 No connect. These pins must be tied to ground or left floating in the application. PGND 10, 11 G Power ground. Connect this to an internal ground plane or other large ground plane. Input supply pin. PVIN is connected to the input voltage. This rail connects to the source of PVIN 6, 7 I the internal power PFET. SGND 3 G Signal ground. Output voltage sense pin. Connect this pin to the output voltage as close to the load as SNS 14 O possible. Soft-start pin. Connect this pin to a small capacitor to control startup. The soft-start SS 4 I capacitance range is restricted to values 1 nF to 50 nF. SW 8, 9 O Switch pin. Connect to the output inductor. Copyright © 2005–2016, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM2852 |
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