6

MITSUBISHI MICROCOMPUTERS

M37735EHBXXXFP

M37735EHBFS

PROM VERSION OF M37735MHBXXXFP

PRELIMINAR

Y

Notice:

This

is not

a final

specification.

Some

parametric

limits

are

subject

to change.

Fig. 1 Bit configuration of oscillation circuit control register 1 (corresponding to Figure 63 in data sheet “M37735MHBXXXFP”)

Fig. 2 How to write data in oscillation circuit control register 1 (indentical with Figure 64 in data sheet “M37735MHBXXXFP”)

Reset clock prescaler

• How to reset clock prescaler

Note. “Y” is the sum of bits to be set. For example, when

setting bits 2 and 1 to “1”, “Y” becomes “6”.

Next instruction

BASIC FUNCTION BLOCKS

The M37735EHBXXXFP has the same functions as the

M37735MHBXXXFP except for the following:

(1) The built-in ROM is PROM.

(2) The status of bit 3 of the oscillation circuit control register 1 (address

(3) The usage condition of bit 3 of the oscillation circuit control register

1 is different.

(4) Part of the processor mode selection method is different.

Accordingly, refer to the basic function blocks description in the

M37735MHBXXXFP except for Figure 1 (bit configuration of

oscillation circuit control register 1), Figure 3 (microcomputer internal

status during reset), and Table 1 (microprocessor mode selection

method).

In the M37735EHBXXXFP, bit 3 of the oscillation circuit control register

1 must be “0”. (Refer to Figure 1.) Bit 3 is “1” at a reset. Accordingly,

write “0” to bit 3 in the single-chip mode after reset.

Figure 2 shows how to write data in oscillation circuit control register

1.

In the M37735EHBXXXFP, the microprosessor mode cannot be

chip mode.

Note. Write to the oscillation circuit control

register 1 as the flow shown in Figure 2.

Oscillation circuit control register 1

Main clock division selection bit

0 : Main clock is divided by 2.

1 : Main clock is not divided by 2.

Main clock external input selection bit

0 : Main-clock oscillation circuit is operating by itself.

Watchdog timer is used at returning from STP state.

1 : Main-clock is input externally.

Watchdog timer is not used at returning from STP state.

Sub clock external input selection bit

0 : Sub-clock oscillation circuit is operating by itself.

Watchdog timer is used at returning from STP state.

1 : Sub-clock is input externally.

Watchdog timer is not used at returning from STP state.

0 : Always “0” (This bit is “1” at reset, so that write this bit to “0”.)

Clock prescaler reset bit

Address

00

76543

2

1

0

modes

Description

Single-chip mode upon starting

after reset. Each mode can be

selected by changing the

processor mode bits by software.

Mode

· Single-chip

· Memory expansion

· Microprocessor