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HD64570CP Datasheet(PDF) 5 Page - Hitachi Semiconductor |
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HD64570CP Datasheet(HTML) 5 Page - Hitachi Semiconductor |
5 / 469 page Rev. 0, 07/98, page i of 11 Preface The HD64570 serial communications adaptor (SCA) peripheral chip enables a host microprocessor to perform asynchronous, byte-synchronous, or bit-synchronous serial communication. Its two full-duplex, multiprotocol serial channels support a wide variety of protocols, including frame relay, LAPB, LAPD, bisync, and ™DDCMP. Its built-in direct memory access controller (DMAC) is equipped with a 32-stage FIFO and can execute chained- block transfers. Due to its DMAC and 16-bit bus interface, the SCA supports serial data transfer rates up to 12 Mbits/s without monopolizing the bus, even in full-duplex communication. Other on-chip features of the SCA, including four types of MPU interfaces, a bus arbiter, timers, and an interrupt controller, provide added functionality in a wide range of applications, such as frame relay exchanges/system multiplexes, private branch exchanges, computer networks, workstations, ISDN terminals, and facsimile. ™DDCMP is a trademark of Digital Equipment Corporation. |
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