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UCC28704 Datasheet(PDF) 10 Page - Texas Instruments |
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UCC28704 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 44 page S1 VSR S2 AS OCV F VSR R V R N (V V ) V u u IN(run) BULK(run) S1 PA VSL(run) PA VSL(run) 2 V V R N I N I u | u u 10 UCC28704 SLUSCA8A – FEBRUARY 2016 – REVISED FEBRUARY 2016 www.ti.com Product Folder Links: UCC28704 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.3 Feature Description 7.3.1 Detailed Pin Description 7.3.1.1 VDD (Device Bias Voltage Supply) The VDD pin is typically powered from a rectified auxiliary transformer winding, the same winding that is used to capture the output voltage level. A bypass capacitor, with minimum value 0.047 μF, on the VDD pin is used for initially biasing the device to start-up along with a resistive or active source of start-up charging current. UVLO start / stop levels of 21 V / 7.7 V accommodate lower values of VDD capacitance that in turns keeps the start-up current low, which for resistive start-up has an impact on both stand-by power and power-on delay. A high, 35-V, maximum operating level on VDD alleviates concerns with leakage energy charging of VDD and gives added flexibility to when varying power supply output voltage must be supported. 7.3.1.2 GND (Ground) This is an external return pin, and provides the reference point for both external signal and the gate drive of the device. The VDD bypass capacitor should be placed close to this pin. Critical component GND connections from the VS, CS and NTC pins should have dedicated and short paths to this pin. 7.3.1.3 VS (Voltage-Sense) The VS pin is connected to a resistor divider from the auxiliary winding to ground. The output-voltage feedback information is sampled at the end of the transformer secondary current demagnetization time to provide an accurate representation of the output voltage. Timing information to achieve valley-switching and to control the duty cycle of the secondary transformer current is determined by the waveform on the VS pin. The VS input is a critical signal and will generally be with relatively high impedance. To avoid unpredictable behavior avoid placing a filter capacitor on this pin and keep the total PCB area tied to VS at a minimum. The VS pin also senses the bulk capacitor input voltage to provide for ac-input run and stop thresholds, and to compensate the current-sense threshold across the AC-input range. This information is sensed by monitoring the current pulled out of the VS pin during the MOSFET on-time. During this time the voltage on the VS pin is clamped to about 250mV below GND. As a result, the current out of the pin is determined by the upper VS divider resistor, the auxiliary to primary turns-ratio and the bulk input voltage level. For the AC-input run/stop function, the run threshold on VS is IVSL(run) (typical 220 µA) and the stop threshold is IVSL(stop) (typical 80 µA). The values for the auxiliary voltage divider upper-resistor RS1 and lower-resistor RS2 can be determined by the equations below. where • NPA is the transformer primary-to-auxiliary turns ratio, • VIN(run) is the AC rms voltage to enable turn-on of the flyback converter (run), • VBULK(run) is the DC bulk voltage to enable turn-on of the flyback converter (run), • IVSL(run) is the run-threshold for the current pulled out of the VS pin during the primary MOSFET on-time. (see the Electrical Characteristics table). (1) where • VOCV is the converter regulated output voltage, • VF is the output rectifier forward voltage drop at near-zero current, • NAS is the transformer auxiliary to secondary turns ratio, • RS1 is the VS divider high-side resistance, • VVSR is the CV regulating level at the VS input (see the Electrical Characteristics table). (2) This pin is also used to sense the output constant current under voltage (CCUV) level, used to shut down the converter in the case of a soft-short circuit at its output. Refer to Constant Current Under-Voltage Protection for further information. |
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