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TPS6591104DA2ZRC Datasheet(PDF) 10 Page - Texas Instruments |
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TPS6591104DA2ZRC Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 119 page  10 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 SWCS049Q – JUNE 2010 – REVISED MARCH 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Pin Configuration and Functions Copyright © 2010–2016, Texas Instruments Incorporated Table 4-1. Pin Functions (continued) NAME BGA PIN SUPPLIES TYPE I/O DESCRIPTION PU / PD PGOOD C4 VCC7, GNDC Analog O, OD VDDCtrl, internal signal, leave floating (controller trimming only) PWRDN N2 VRTC, DGND Analog I Reset input (for example, thermal reset) PWRHOLD N1 VRTC, DGND Digital I Switch-on, switch off control signal or GPI Programmable PD (default active) PWRON E4 VCC7, DGND Digital I External switch-on control (ON button) Programmable PU (default active) REFGND G7 REFGND Analog I/O Reference ground No SCL_SCK M4 VDDIO, DGND Digital I/O I2C bidirectional clock signal or serial peripheral interface clock input (multiplexed) External PU SDA_SDI M5 VDDIO, DGND Digital I/O I2C bidirectional data signal or serial peripheral interface data input (multiplexed) External PU SLEEP F1 VDDIO, DGND Digital I ACTIVE-SLEEP state transition control signal Programmable PD (default active) SW A4 VBST, GNDC Analog I VDDCtrl, Switch node SWIO K7, K8 VCCIO, GNDIO Power O VIO DCDC switched output No SW1 D1, D2, E2 VCC1, GND1 Power O VDD1 DCDC switched output No SW2 H1, H2 VCC2, GND2 Power O VDD2 DCDC switched output No TESTV B8 VCC7, AGND Analog O Analog test output (DFT) No TRAN C6 VCC7, GNDC Analog I Internal functional pin, leave floating (controller trimming only) TRIP B3 V5IN, GNDC Analog I VDDCtrl, OCL detection threshold pin VBACKUP D7 VBACKUP, AGND Power I Backup battery input No VBST A2 VBST, GNDC Analog I VDDCtrl, supply for high-side FET driver VCCIO L7, L8 VCCIO, GNDIO Power I VIO DCDC power Input No VCCS E8 VCC7, DGND Analog I/O Input for two comparators VCC1 E1, F2, F3 VCC1, GND1 Power I VDD1 DCDC power Input No VCC2 G1, G2 VCC2, GND2 Power I VDD2 DCDC power Input No VCC3 N3 VCC3, AGND2 Power I LDO6, LDO7, LDO8 power Input No VCC4 L1 VCC4, AGND2 Power I LDO5 power Input No VCC5 D8 VCC5, AGND Power I LDO3, LDO4 power Input No VCC6 N5 VCC6, AGND2 Power I LDO1, LDO2 power Input No VCC7 B6 VCC7, REFGND Power I VRTC power input and analog references supply No VDDIO N7 VDDIO, DGND Power I Digital Ios supply No VFB C5 VOUT, GNDC Analog I VDDCtrl, slew rate control capacitance VFBIO H8 VCC7, DGND Analog I VIO feedback voltage PD 5 µA VFB1 D4 VCC7, DGND Analog I VDD1 feedback voltage PD 5 µA VFB2 K2 VCC7, DGND Analog I VDD2 DCDC feedback voltage PD 5 µA VOUT B4 VOUT, GNDC Analog I VDDCtrl, Feedback input VREF G8 VCC7, REFGND Analog O Band-gap voltage No VRTC B5 VCC7, REFGND Power O LDO Regulator output PD 5 µA V5IN A5 V5IN, GNDC Power I VDDCtrl, 5-V input |
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