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LM5022-Q1

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SNVSAG9 – MARCH 2016

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Feature Description (continued)

7.3.3 Error Amplifier

An internal high gain error amplifier is provided within the LM5022-Q1. The amplifier’s non-inverting input is

internally set to a fixed reference voltage of 1.25 V. The inverting input is connected to the FB pin. In non-

resistor divider. The control loop compensation components are connected between the COMP and FB pins. For

most isolated applications the error amplifier function is implemented on the secondary side of the converter and

the internal error amplifier is not used. The internal error amplifier is configured as an open drain output and can

be disabled by connecting the FB pin to ground. An internal 5-k

Ω pullup resistor between a 5-V reference and

COMP can be used as the pull-up for an opto-coupler in isolated applications.

7.3.4 Current Sensing and Current Limiting

The LM5022-Q1 provides a cycle-by-cycle over current protection function. Current limit is accomplished by an

internal current sense comparator. If the voltage at the current sense comparator input exceeds 0.5 V, the

MOSFET gate drive will be immediately terminated. A small RC filter, located near the controller, is

recommended to filter noise from the current sense signal. The CS input has an internal MOSFET which

discharges the CS pin capacitance at the conclusion of every cycle. The discharge device remains on an

additional 65 ns after the beginning of the new cycle to attenuate leading edge ringing on the current sense

signal.

The LM5022-Q1 current sense and PWM comparators are very fast, and may respond to short duration noise

pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated

with the CS filter must be located very close to the device and connected directly to the pins of the controller (CS

and GND). If a current sense transformer is used, both leads of the transformer secondary should be routed to

the sense resistor and the current sense filter network. The current sense resistor can be located between the

source of the primary power MOSFET and power ground, but it must be a low inductance type. When designing

with a current sense resistor all of the noise sensitive low-power ground connections should be connected

together locally to the controller and a single connection should be made to the high current power ground

(sense resistor ground point).

7.3.5 PWM Comparator and Slope Compensation

The PWM comparator compares the current ramp signal with the error voltage derived from the error amplifier

output. The error amplifier output voltage at the COMP pin is offset by 1.4 V and then further attenuated by a 3:1

resistor divider. The PWM comparator polarity is such that 0 V on the COMP pin will result in a zero duty cycle at

the controller output. For duty cycles greater than 50%, current mode control circuits can experience sub-

harmonic oscillation. By adding an additional fixed-slope voltage ramp signal (slope compensation) this

oscillation can be avoided. Proper slope compensation damps the double pole associated with current mode

control (see Control Loop Compensation) and eases the design of the control loop compensator. The LM5022-

generated by the clock (see Figure 13). This current flows through an internal 2-k

Ω resistor to create a minimum

the Functional Block Diagram, the sensed current slope and the compensation slope add together to create the

signal used for current limiting and for the control loop itself.