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Product Specification

PE99153 DIE

Theory of Operation

General

The PE99153 is a radiation-hardened point-of-load buck

regulator. This highly integrated switching regulator

contains two synchronous power switches capable of

delivering up to 6A of continuous current. The PE99153

is designed to operate from a wide 5V bus and provide

1.0V to 3.6V supply rails for analog, digital and RF

payloads. The internal oscillator can operate at 500 kHz

or 1 MHz. Optionally, the switching frequency can be

synchronized to an external reference from 100 kHz to

5 MHz. Current limiting is adjustable with an external

resistor and is achieved through peak current mode

control. An external resistor also provides adjustable

slope compensation to optimize stability and closed loop

bandwidth across output voltage and switching frequency

range. Loop compensation is externally adjustable to

meet application transient response while still

maintaining stability requirements. The output is tri-stated

when the SDb pin is low to enable hot-spare capability.

Peak Current Mode Control Loop

The PE99153 uses a peak current mode control

architecture. At the falling edge of either the internal

oscillator or, if present, the external reference, the high

side switch turns on. The input voltage is then connected

to the load voltage through the high side switch and the

inductor for a time greater than the minimum-on-time.

Current in the inductor begins to ramp approximately as

this period. As the inductor current rises, current through

the high side switch is sensed and compared to a current

threshold. The inductor current continues to ramp until

the current threshold is reached. At this point the high

side switch turns off and the low side switch turns on for

at least the minimum-off-time. Energy stored in the

inductor during the previous phase is discharged into the

load supply rail through the low side switch and the

inductor. Inductor current decreases at a rate of

the next falling edge of the reference clock. In order to

prevent unintended harmonics or spurs, the part does not

exit continuous conduction mode.

Whether the current threshold was met in the previous

clock cycle or not, a minimum-off-time, followed by a

minimum-on-time immediately follows the falling edge of

the reference clock.

While providing improved bandwidth and inherent current

limiting, all current mode control switching regulators

require slope compensation to ensure stability across all

application conditions. The PE99153 provides adjustable

slope compensation to allow the designer to optimize

transient response and stability requirements. The

compensation ramp is provided through the ICOMP pin.

Inboard of the ICOMP pin is the CICOMP capacitor which

can be used to generate an RC compensation ramp by

external resistor to produce the desired ramp. See the

design guide for selection of the appropriate resistor

value. The RC ramp is reset anytime the low side switch

is on by a FET switch.

Current Threshold and Over Current Protection

The current mode control threshold current is set by the

ISET pin which is driven by the voltage control loop from

the EAOUT pin. The PE99153 takes the voltage applied

to the ISET pin, subtracts 0.7V (typ) and applies that

resistor connected to the RSET pin is used if the RSEL

resistor is then used as a scaled current reference for the

inductor current threshold comparison. The scaling ratio

Over current protection is achieved by limiting the

resistor to the VMAXRSET value listed in Table 2. Thus,

the current limit can be adjusted by selection of the

characterization and testing to a high current in the lab

while still limiting the current to lower level in the

application.

Voltage Control Loop

The output voltage is achieved by controlling the ISET

pin. The PE99153 contains an amplifier with both of the

positive and negative input terminals, EAINP and EAINM

respectively, and the output terminal EAOUT all pinned

out to package pins. This allows for flexible configurations

of the voltage reference, error amplifier, feedback

networks and the current mode control loop. In normal

configuration the error amp senses the output voltage,

voltage to the 1.000V reference and increases the

voltage applied to the ISET pin when the output voltage is

low and decreases the voltage applied to the ISET pin

when the output voltage is high. Loop compensation is

required to attenuate the frequency content at and above

the switching frequency and to achieve the desired phase

margin in the voltage control loop. See the Design Guide

for instructions on designing the compensation network.