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97240-01 Datasheet(PDF) 4 Page - Peregrine Semiconductor |
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97240-01 Datasheet(HTML) 4 Page - Peregrine Semiconductor |
4 / 21 page Page 4 of 21 ©2010-2015 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-15214-7 │ UltraCMOS® RFIC Solutions Product Specification PE97240 Table 3. Absolute Maximum Ratings Notes: 1. Human Body Model (MIL-STD-883 Method 3015). 2. Pin 28 is not used in normal operation. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified. Latch-Up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 2. Operating Ratings Parameter/Condition Symbol Min Max Unit Supply voltage VDD –0.3 3.3 V Voltage on any input VI –0.3 VDD + 0.3 V DC into any input II –10 +10 mA DC into any output IO –10 +10 mA Storage temperature range TST –65 +150 °C ESD voltage HBM1 All pins except pin 28 1000 V ESD voltage HBM1,2 On pin 28 300 V VESD_HBM Thermal resistance TJC 33.4 °C/W Junction temperature TJ +125 °C RF input power, CW 50 MHz–5 GHz PMAX_CW 10 dBm Parameter/Condition Symbol Min Max Unit Supply voltage VDD 2.6 2.8 V Operating ambient temperature range TA –40 +85 C Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ELDRS UltraCMOS devices do not include bipolar minority carrier elements, and therefore do not exhibit enhanced low dose rate sensitivity. Table 4. Single Event Effects1 SEE Mode Effective Linear Energy Transfer (LET)2 SEL 86 MeV cm2/mg SET 30 MeV cm2/mg 3 SEFI 86 MeV cm2/mg SEU 86 MeV cm2/mg Notes: 1. Testing performed using serial programming mode. 2. SEE testing was conducted with Au, Ho, Xe, Kr, Cu ion species at 0° incidence. 3. Minor transients (phase errors) observed resulting in self-recovering operation without intervention. |
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