PE43711

UltraCMOS® RF Digital Step Attenuator

Page 2

DOC-44414-2 – (3/2015)

www.psemi.com

Peregrine’s HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an

innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and

integration of conventional CMOS.

Absolute Maximum Ratings

extended periods may reduce reliability.

ESD Precautions

When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.

Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to

Latch-up Immunity

Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.

Parameter/Condition

Min

Max

Unit

–0.3

5.5

V

Digital input voltage

–0.3

3.6

V

RF input power, 50

Ω

9 kHz–48 MHz

>48 MHz–6 GHz

Figure 5

+31

dBm

dBm

Storage temperature range

–65

+150

°C

3000

V

1000

V

Notes:

1) Human body model (MIL–STD 883 Method 3015).

2) Charged device model (JEDEC JESD22-C101).