PE42553

UltraCMOS® SPDT RF Switch

Page 2

DOC-62463-2 – (11/2014)

www.psemi.com

Peregrine’s HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an

innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and

integration of conventional CMOS.

to bypass the internal negative voltage generator.

Absolute Maximum Ratings

Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be

restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for

extended periods may reduce reliability.

ESD Precautions

When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.

Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to

avoid exceeding the rating specified in Table 1.

Latch-up Immunity

Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.

Parameter/Condition

Min

Max

Unit

–0.3

5.5

V

Digital input voltage, CTRL

–0.3

3.6

V

LS input voltage

–0.3

3.6

V

RF input power, CW (RFC–RFX)(1)

9 kHz–10 MHz

>10 MHz–8 GHz

Fig. 2, Fig. 3

37

dBm

dBm

RF input power, pulsed (RFC–RFX)(2)

9 kHz–10 MHz

>10 MHz–8 GHz

Fig. 2, Fig. 3

Fig. 4, Fig. 5

dBm

dBm

RF input power into terminated ports, CW (RFX)(1)

9–800 kHz

>800 kHz–8 GHz

Fig. 2, Fig. 3

28

dBm

dBm

Storage temperature range

–65

+150

°C

ESD voltage HBM(3)

RF pins to GND

All pins

4000

2500

V

V