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ATMEGA162-16MI Datasheet(PDF) 6 Page - ATMEL Corporation |
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ATMEGA162-16MI Datasheet(HTML) 6 Page - ATMEL Corporation |
6 / 323 page 6 ATmega162/V 2513F–AVR–12/03 Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the ATmega162 as listed on page 77. Port E(PE2..PE0) Port E is an 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E also serves the functions of various special features of the ATmega162 as listed on page 80. RESET Reset input. A low level on this pin for longer than the minimum pulse length will gener- ate a Reset, even if the clock is not running. The minimum pulse length is given in Table 18 on page 47. Shorter pulses are not guaranteed to generate a reset. XTAL1 Input to the Inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the Inverting Oscillator amplifier. About Code Examples This documentation contains simple code examples that briefly show how to use various parts of the device. These code examples assume that the part specific header file is included before compilation. Be aware that not all C compiler vendors include bit defini- tions in the header files and interrupt handling in C is compiler dependent. Please confirm with the C compiler documentation for more details. |
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