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HD6435348RCP Datasheet(PDF) 8 Page - Hitachi Semiconductor |
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HD6435348RCP Datasheet(HTML) 8 Page - Hitachi Semiconductor |
8 / 487 page 10.5 CPU Interrupts and DTC Interrupts ···················································································201 10.6 Synchronization of Free-Running Timers 1 to 3 ································································202 10.6.1 Synchronization after a Reset ·················································································202 10.6.2 Synchronization by Writing to FRCs ······································································202 10.7 Sample Application ············································································································206 10.8 Application Notes ··············································································································206 Section 11 8-Bit Timer 11.1 Overview ····························································································································213 11.1.1 Features ···················································································································213 11.1.2 Block Diagram ········································································································214 11.1.3 Input and Output Pins ·····························································································215 11.1.4 Register Configuration ····························································································215 11.2 Register Descriptions ·········································································································215 11.2.1 Timer Counter (TCNT)—H'FED4 ··········································································215 11.2.2 Time Constant Registers A and B (TCORA and TCORB)—H'FED2 and H'FED3 ·····················································216 11.2.3 Timer Control Register (TCR)—H'FED0 ·······························································216 11.2.4 Timer Control/Status Register (TCSR)—H'FED1 ··················································218 11.3 Operation ····························································································································220 11.3.1 TCNT Incrementation Timing ················································································220 11.3.2 Compare Match Timing ··························································································221 11.3.3 External Reset of TCNT ·························································································223 11.3.4 Setting of TCNT Overflow Flag ·············································································224 11.4 CPU Interrupts and DTC Interrupts ···················································································224 11.5 Sample Application ············································································································225 11.6 Application Notes ··············································································································226 Section 12 PWM Timer 12.1 Overview ····························································································································233 12.1.1 Features ···················································································································233 12.1.2 Block Diagram ········································································································233 12.1.3 Input and Output Pins ·····························································································234 12.1.4 Register Configuration ····························································································235 12.2 Register Descriptions ·········································································································235 12.2.1 Timer Counter (TCNT)—H'FEC2, H'FEC4, H'FECA ···········································235 12.2.2 Duty Register (DTR)—H'FEC1, H'FEC5, H'FEC9 ················································236 12.2.3 Timer Control Register (TCR)—H'FEC0, H'FEC4, H'FEC8 ·································236 12.3 Operation ····························································································································238 12.4 Application Notes ··············································································································240 |
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