There are circumstances where the assumption that SDA

= SCL = V+ on power-up is not true (e.g., in applications

in which there is legitimate bus activity during power-up).

Also, if SDA and SCL are terminated with pullup resis-

tors to a different supply voltage than the MAX7321’s

supply voltage, and if that pullup supply rises later than

the MAX7321’s supply, then SDA or SCL may appear at

power-up to be connected to GND. In such applications,

use the four address combinations that are selected by

connecting address inputs AD2 and AD0 to V+ or GND

(shown in

bold in Table 3). These selections are guaran-

teed to be correct at power-up, independent of SDA and

SCL behavior. If one of the other 12 address combinations

is used, an unexpected combination of pullups might be

not necessarily the MAX7321) is put on the bus, and an

unexpected combination of ports may initialize as

logic-low outputs instead of inputs or logic-high outputs.

Port Inputs

I/O port inputs switch at the CMOS-logic levels, as

determined by the expander’s supply voltage, and are

overvoltage tolerant to +6V, independent of the expander’s

supply voltage.

I/O Port Input Transition Detection

All I/O ports configured as inputs are monitored for changes

since the expander was last accessed through the serial

interface. The state of the input ports is stored in an internal

“snapshot” register for transition monitoring. The snapshot

is continuously compared with the actual input conditions,

and if a change is detected for any port, INT is asserted

to signal a state change. An internal transition flag is set

for that port. The input is sampled (internally latched into

the snapshot register) and the old transition flags cleared

and write access. The previous port transition flags are

read through the serial interface as the second byte of a

2-byte read sequence.

Table 3. MAX7321 Address Map

PIN CONNECTION

DEVICE ADDRESS

40kΩ INPUT PULLUP ENABLES

AD2

AD0

A6

A5

A4

A3

A2

A1

A0

I7

I6

I5

I4

I3

I2

I1

I0

SCL

GND

1

1

0

0

0

0

0

Y

Y

Y

Y

—

—

—

—

SCL

V+

1

1

0

0

0

0

1

Y

Y

Y

Y

Y

Y

Y

Y

SCL

SCL

1

1

0

0

0

1

0

Y

Y

Y

Y

Y

Y

Y

Y

SCL

SDA

1

1

0

0

0

1

1

Y

Y

Y

Y

Y

Y

Y

Y

SDA

GND

1

1

0

0

1

0

0

Y

Y

Y

Y

—

—

—

—

SDA

V+

1

1

0

0

1

0

1

Y

Y

Y

Y

Y

Y

Y

Y

SDA

SCL

1

1

0

0

1

1

0

Y

Y

Y

Y

Y

Y

Y

Y

SDA

SDA

1

1

0

0

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

GND

GND

1

1

0

1

0

0

0

—

—

—

—

—

—

—

—

GND

V+

1

1

0

1

0

0

1

—

—

—

—

Y

Y

Y

Y

GND

SCL

1

1

0

1

0

1

0

—

—

—

—

Y

Y

Y

Y

GND

SDA

1

1

0

1

0

1

1

—

—

—

—

Y

Y

Y

Y

V+

GND

1

1

0

1

1

0

0

Y

Y

Y

Y

—

—

—

—

V+

V+

1

1

0

1

1

0

1

Y

Y

Y

Y

Y

Y

Y

Y

V+

SCL

1

1

0

1

1

1

0

Y

Y

Y

Y

Y

Y

Y

Y

V+

SDA

1

1

0

1

1

1

1

Y

Y

Y

Y

Y

Y

Y

Y

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