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TMS5703137CGWTMEP Datasheet(PDF) 3 Page - Texas Instruments |
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TMS5703137CGWTMEP Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 157 page  TMS570LS3137-EP www.ti.com SPNS230D – OCTOBER 2013 – REVISED FEBRUARY 2015 The DCAN supports the CAN 2.0 (A and B) protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for systems operating in noisy and harsh environments (for example, automotive vehicle networking and industrial fieldbus) that require reliable serial communication or multiplexed wiring. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device via the I2C serial bus. The I2C supports speeds of 100 and 400 Kbps. The frequency-modulated phase-locked loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. There are two FMPLL modules on this device. These modules, when enabled, provide two of the seven possible clock source inputs to the global clock module (GCM). The GCM manages the mapping between the available clock sources and the device clock domains. The device also has an external clock prescaler (ECP) module that when enabled, outputs a continuous external clock on the ECLK pin/ball. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency. The DMA controller has 16 channels, 32 control packets and parity protection on its memory. An MPU is built into the DMA to limit the DMA to prescribed areas of memory and to protect the rest of the memory system from any malfunction of the DMA. The Error Signaling Module (ESM) monitors all device errors and determines whether an interrupt is generated or the external ERROR pin is toggled when a fault is detected. The ERROR pin can be monitored externally as an indicator of a fault condition in the microcontroller. The External Memory Interface (EMIF) provides off-chip expansion capability with the ability to interface to synchronous DRAM (SDRAM) devices, asynchronous memories, peripherals or FPGA devices. Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built in ARM Cortex-R4F CoreSight debug features an External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or only minimum impact on the program execution time of the application code. A Parameter Overlay Module (POM) can reroute flash accesses to internal memory or to the EMIF. This rerouting allows parameters and tables to be dynamically calibrated against production code without rebuilding the code to explicitly access RAM or halting the processor to reprogram the data flash. With integrated safety features and a wide choice of communication and control peripherals, the device is an ideal solution for high-performance real-time control applications with safety-critical requirements. Table 1-1. Device Information(1) ORDER NUMBER PACKAGE TA TMS5703137CGWTQEP –40°C to 125°C NFBGA (337) TMS5703137CGWTMEP –55°C to 125°C (1) For more information, see Section 9, Mechanical Packaging and Orderable Information. Copyright © 2013–2015, Texas Instruments Incorporated Device Overview 3 Submit Documentation Feedback Product Folder Links: TMS570LS3137-EP |
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