6

DRV8301

SLOS719F – AUGUST 2011 – REVISED JANUARY 2016

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Copyright © 2011–2016, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

see

(1)

MIN

MAX

UNIT

Supply voltage

Relative to PGND

–0.3

65

V

Maximum supply voltage ramp rate

1

V/µS

Maximum voltage between PGND and GND

–0.3

0.3

V

Maximum current for all digital and analog inputs (INH_A, INL_A, INH_B, INL_B,

INH_C, INL_C, SCLK, SCS, SDI, EN_GATE, DC_CAL, DTC)

–1

1

mA

Maximum sinking current for open-drain pins (nFAULT and nOCTW Pins)

7

mA

Voltage for SPx and SNx pins

–0.6

0.6

V

Input voltage range for logic/digital pins (INH_A, INL_A, INH_B, INL_B, INH_C,

INL_C, EN_GATE, SCLK, SDI, SCS, DC_CAL)

–0.3

7

V

Maximum voltage for GVDD pin

13.2

V

Maximum voltage for AVDD pin

8

V

Maximum voltage for DVDD pin

3.6

V

Maximum voltage for VDD_SPI pin

7

V

Maximum voltage for SDO pin

VDD_SPI + 0.3

V

Maximum reference voltage for current amplifier

7

V

Maximum current for REF pin

100

µA

Maximum operating junction temperature

–40

150

°C

Storage temperature

–55

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic

discharge

±2000

V

±500