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SN74LVC1G139 Datasheet(PDF) 10 Page - Texas Instruments |
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SN74LVC1G139 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 22 page VCC Chip Select 2 Address line 14 Chip Select 3 GND Plane Address line 15 6 5 7 1 2 3 4 8 2F A B Y3 GND VCC Y0 Y1 Y2 GND Chip Select 1 Chip Select 0 SN74LVC1G139 SN74LVC1G139 SCES602D – AUGUST 2004 – REVISED AUGUST 2015 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SN74LVC1G139 device is a 2-of-4 decoder and demultiplexer. This device decodes the 2-bit address on inputs A (bit 0) and B (bit 1) then provides a logic low on the matching address output. It can produce 24 mA of drive current at 3.3 V, making it ideal for driving multiple outputs. 9.2 Typical Application This is an address line decoder using a 16-bit bus example; address bus lines 14 and 15 are decoded and drive four active low chip selects. Each output covers 16k address space mapped by the address bus lines 0 through 13. Figure 4. Typical Application Diagram 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. Outputs can be combined to produce higher drive but the high drive will also create faster edges into light loads so routing and load conditions should be considered to prevent ringing. 9.2.2 Detailed Design Procedure 1. Recommended Input Conditions: – For rise time and fall time specifications, see ( Δt/ΔV) in Recommended Operating Conditions table. – For specified high and low levels, see (VIH and VIL) in Recommended Operating Conditions table. – Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC. 2. Recommend Output Conditions: – Load currents should not exceed 50 mA per output and 100 mA total for the part. – Series resistors on the output may be used if the user desires to slow the output edge signal or limit the output current. 10 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN74LVC1G139 |
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