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SN74LV4046ANSR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LV4046ANSR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 26 page Voltage Controlled Oscillator Phase Comparator 1 Phase Comparator 2 Phase Comparator 3 3 COMPIN SIGIN 14 2 PC1OUT PCPOUT 1 5 INH VCOOUT 4 7 C1B C1A 6 9 VCOIN GND 8 11 R1 DEMOUT 10 13 PC2OUT R2 12 15 PC3OUT VCC 16 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LV4046A SCES656D – FEBRUARY 2006 – REVISED SEPTEMBER 2015 SN74LV4046A High-Speed CMOS Logic Phase-Locked Loop With VCO 1 1 Features The signal input can be directly coupled to large • Choice of Three Phase Comparators voltage signals, or indirectly coupled (with a series – Exclusive OR capacitor) to small voltage signals. A self-bias input – Edge-Triggered J-K Flip-Flop circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low- – Edge-Triggered RS Flip-Flop pass filter, the SN74LV4046A forms a second-order • Excellent VCO Frequency Linearity loop PLL. The excellent VCO linearity is achieved by • VCO-Inhibit Control for ON/OFF Keying and for the use of linear operational amplifier techniques. Low Standby Power Consumption Various applications include telecommunications, • Optimized Power-Supply Voltage Range From 3 V digital phase-locked loop and signal generators. to 5.5 V Device Information(1) • Wide Operating Temperature Range . . . –40°C to PART NUMBER PACKAGE BODY SIZE (NOM) 125°C SOP (16) 7.70mm x 10.20mm • Latch-Up Performance Exceeds 250 mA Per SN74LV4046A SOIC (16) 6.00mm x 9.90mm JESD 17 TSSOP (16) 6.40mm x 5.00mm • ESD Protection Exceeds JESD 22 (1) For all available packages, see the orderable addendum at – 2000-V Human Body Model (A114-A) the end of the data sheet. – 200-V Machine Model (A115-A) SN74LV4046A Functional Block Diagram – 1000-V Charged-Device Model (C101) 2 Applications • Telecommunications • Signal Generators • Digital Phase-Locked Loop 3 Description The SN74LV4046A is a high-speed silicon-gate CMOS device that is pin compatible with the CD4046B and the CD74HC4046. The device is specified in compliance with JEDEC Std 7. The SN74LV4046A is a phase-locked loop (PLL) circuit that contains a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2, and PC3). A signal input and a comparator input are common to each comparator. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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