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SN74LV8154NE4 Datasheet(PDF) 1 Page - Texas Instruments

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Part # SN74LV8154NE4
Description  Dual 16-Bit Binary Counters With 3-State Output Registers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN74LV8154NE4 Datasheet(HTML) 1 Page - Texas Instruments

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CCKB
CCKBEN
RCLK
CCKA
CCLR
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
16-Bit Counter B
16-Bit Counter A
GAL
GAU
GBL
GBU
4 to 1 Dec
4 to 1 Dec
4 to 1 Dec
4 to 1 Dec
4 to 1 Dec
4 to 1 Dec
4 to 1 Dec
4 to 1 Dec
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
RCOA
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SN74LV8154
SCLS589A – AUGUST 2004 – REVISED OCTOBER 2015
SN74LV8154 Dual 16-Bit Binary Counters With 3-State Output Registers
Check for Samples: SN74LV8154
1 Features
3 Description
The SN74LV8154 device is a dual 16-bit binary
1
Can Be Used as Two 16-Bit Counters or a Single
counter with 3-state output registers, designed for 2-V
32-Bit Counter
to 5.5-V VCC operation.
8 bit counter read bus
The counters have dedicated clock inputs. The
2-V to 5.5-V VCC Operation
counters share a clocked storage register to sample
Maximum tpd of 25 ns at 5 V (RCLK to Y)
and save the counter contents. Both counters share
Typical VOLP (Output Ground Bounce)
an asynchronous clear input. The 32-bit storage
register can be mapped on the output bus 8-bits at a
< 0.7 V at VCC = 5 V, TA = 25°C
time. Four bus reads are needed to access the
Typical VOHV (Output VOH Undershoot)
contents of both stored counts. The two counters can
> 4.4 V at VCC = 5 V, TA = 25°C
be chained by connecting CLKBEN to RCOA. All
Ioff Supports Partial-Power-Down Mode Operation
clocks are positive edge triggered. All other inputs are
active low.
Latch-Up Performance Exceeds 250 mA
Per JESD 17
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
ESD Protection Exceeds JESD 22
outputs,
preventing
damaging
current
backflow
2000-V Human Body Model (A114-A)
through the device when it is powered down.
200-V Machine Model (A115-A)
Device Information(1)
1000-V Charged-Device Model (C101)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
2 Applications
SN74LV8154N
PDIP (20)
6.50 mm x 4.40 mm
SN74LV8154PW
TSSOP (20)
26.92 mm x 6.35 mm
Up Counters
(1) For all available packages, see the orderable addendum at
Dual Up Counters
the end of the data sheet.
Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.


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