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SN74AHC1G14 Datasheet(PDF) 11 Page - Texas Instruments

Part # SN74AHC1G14
Description  Single Schmitt-Trigger Inverter Gate
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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SN74AHC1G14 Datasheet(HTML) 11 Page - Texas Instruments

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WORST
BETTER
BEST
1W min.
W
SN74AHC1G14
www.ti.com
SCLS321Q – MARCH 1996 – REVISED SEPTEMBER 2015
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating listed in the
Recommended Operating Conditions table.
Each VCC terminal must have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-
μF bypass capacitor is recommended. If multiple pins are labeled VCC, then a 0.01-μF or 0.022-μF
capacitor is recommended for each VCC because the VCC pins are tied together internally. For devices with dual-
supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass capacitor is recommended
for each supply pin. To reject different frequencies of noise, use multiple bypass capacitors in parallel. Capacitors
with values of 0.1
μF and 1 μF are commonly used in parallel. The bypass capacitor must be installed as close
as possible to the power terminal for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to the loop antenna theory but are different enough to be discussed
separately from the theory. When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection
occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to
1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed
capacitance and self-inductance of the trace, which results in the reflection. Not all PCB traces can be straight;
therefore some traces must turn corners. Figure 7 shows progressively better techniques of rounding corners.
Only the last example (BEST) maintains constant trace width and minimizes reflections.
11.2 Layout Example
Figure 7. Trace Example
Copyright © 1996–2015, Texas Instruments Incorporated
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