Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

SN74LV74APWRE4 Datasheet(PDF) 4 Page - Texas Instruments

Part # SN74LV74APWRE4
Description  Dual Positive-Edge-Triggered D-Type Flip-Flops
Download  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN74LV74APWRE4 Datasheet(HTML) 4 Page - Texas Instruments

  SN74LV74APWRE4 Datasheet HTML 1Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 2Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 3Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 4Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 5Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 6Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 7Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 8Page - Texas Instruments SN74LV74APWRE4 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 31 page
background image
SN54LV74A, SN74LV74A
SCLS381M – AUGUST 1997 – REVISED MARCH 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage
–0.5
7
V
VI
Input voltage(2)
–0.5
7
V
VO
Voltage applied to any output in the high-impedance or power-off state(2)
–0.5
7
V
VO
Output voltage(2)(3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
VO = 0 to VCC
±25
mA
Continuous current through VCC or GND
±50
mA
D package(4)
86
DB package(4)
96
DGV package(4)
127
θJA
Package thermal impedance
°C/W
NS package(4)
76
PW package(4)
113
RGY package(5)
47
Tstg
Storage temperature
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
This value is limited to 5.5 V maximum.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
(5)
The package thermal impedance is calculated in accordance with JESD 51-5.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-
500
C101(2)
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4
Submit Documentation Feedback
Copyright © 1997–2015, Texas Instruments Incorporated
SN74LV74A


Similar Part No. - SN74LV74APWRE4

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
SN74LV74APWR TI-SN74LV74APWR Datasheet
444Kb / 16P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
More results

Similar Description - SN74LV74APWRE4

ManufacturerPart #DatasheetDescription
logo
Texas Instruments
SN54LV74A TI-SN54LV74A Datasheet
444Kb / 16P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
logo
Potato Semiconductor Co...
PO74G74A POTATO-PO74G74A_14 Datasheet
1Mb / 6P
   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
logo
Texas Instruments
SN54LV74 TI1-SN54LV74_10 Datasheet
148Kb / 8P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
SN54AC74 TI1-SN54AC74_15 Datasheet
1Mb / 22P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
SN54HC74 TI1-SN54HC74_15 Datasheet
164Kb / 15P
[Old version datasheet]   Dual D-Type Positive-Edge-Triggered Flip-Flops
SN54LV74 TI-SN54LV74 Datasheet
137Kb / 7P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
SN74LV74A-EP TI1-SN74LV74A-EP Datasheet
506Kb / 14P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
CD54AC74 TI1-CD54AC74_14 Datasheet
686Kb / 15P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
CD54ACT74 TI1-CD54ACT74_14 Datasheet
887Kb / 14P
[Old version datasheet]   DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
logo
National Semiconductor ...
DM54L74 NSC-DM54L74 Datasheet
88Kb / 4P
   Dual Positive-Edge-Triggered D Flip-Flops
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com