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SN74LV06APW Datasheet(PDF) 4 Page - Texas Instruments |
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SN74LV06APW Datasheet(HTML) 4 Page - Texas Instruments |
4 / 23 page 4 SN54LV06A, SN74LV06A SCES336J – MAY 2000 – REVISED JANUARY 2016 www.ti.com Product Folder Links: SN54LV06A SN74LV06A Submit Documentation Feedback Copyright © 2000–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 6 Specifications 6.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 7 V VI Input voltage range(2) –0.5 7 V VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 7 V IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current VO = 0 to VCC –35 mA Continuous current through VCC or GND ±50 mA Tstg Storage temperature range –65 150 °C TJ Junction Temperature 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V Charged-device model (CDM), per JEDEC specification JESD22- C101(2) ±2000 (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004). (2) Product Preview. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) SN54LV06A(2) SN74LV06A UNIT MIN MAX MIN MAX VCC Supply voltage 2 2 5.5 V VIH High level input voltage VCC = 2 V .5 1.5 V VCC = 2.3 V to 2.7 V VCC × 0.7 VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 VCC × 0.7 VIL Low level input voltage VCC = 2 V 0.5 0.5 V VCC = 2.3 V to 2.7 V VCC × 0.3 VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VCC × 0.3 VCC = 4.5 V to 5.5 V VCC × 0.3 VCC × 0.3 VI Input voltage 0 5.5 0 5.5 V VO Output voltage 0 5.5 0 5.5 V IOL Low level output current VCC = 2 V 50 20 µA VCC = 2.3 V to 2.7 V 2 2 mA VCC = 3 V to 3.6 V 8 8 VCC = 4.5 V to 5.5 V 16 16 Δt/Δv Input transition rise and fall rate VCC = 2.3 V to 2.7 V 200 200 ns/V VCC = 3 V to 3.6 V 100 100 VCC = 4.5 V to 5.5 V 20 20 TA Operating free-air temperature –55 125 –40 125 °C |
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