Unused Input

Input

Output

Input

Unused Input

Output

SN54AHC540, SN74AHC540

www.ti.com

SCLS260L – DECEMBER 1995 – REVISED OCTOBER 2015

Typical Application (continued)

9.2.3 Application Curve

Figure 5. Switching Characteristics Comparison

10 Power Supply Recommendations

The power supply can be any voltage between the MIN and MAX supply voltage rating located in the

power disturbance. For devices with a single supply, 0.1

then 0.01

μF or 0.022 μF is recommended for each power terminal. It is acceptable to parallel multiple bypass

caps to reject different frequencies of noise. A 0.1

μF and 1 μF are commonly used in parallel. The bypass

capacitor should be installed as close to the power terminal as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of

digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used,

or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the

undefined voltages at the outside connections result in undefined operational states. Specified in the Figure 6 are

rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected

to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused

sense or is more convenient. It is acceptable to float outputs unless the part is a transceiver. If the transceiver

has an output enable pin, it will disable the outputs section of the part when asserted. This will not disable the

input section of the I/Os so they also cannot float when disabled.

11.2 Layout Example

Figure 6. Layout Diagram

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