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PEB2256 Datasheet(PDF) 11 Page - Infineon Technologies AG |
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PEB2256 Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 490 page FALC56 V1.2 PEB 2256 List of Figures Page Data Sheet 11 2002-08-27 Figure 85 Intel Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 453 Figure 86 Intel Read Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454 Figure 87 Intel Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454 Figure 88 Motorola Read Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456 Figure 89 Motorola Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456 Figure 90 Digital Line Interface Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . 458 Figure 91 Digital Line Interface Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . 458 Figure 92 RCLK, RFSP Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460 Figure 93 SCLKR/SCLKX Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461 Figure 94 System Interface Marker Timing (Receive) . . . . . . . . . . . . . . . . . . . . 462 Figure 95 SYPR, SYPX Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463 Figure 96 System Interface Marker Timing (Transmit). . . . . . . . . . . . . . . . . . . . 465 Figure 97 XDI, XSIG Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 466 Figure 98 TCLK Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467 Figure 99 XCLK Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 468 Figure 100 SEC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 469 Figure 101 FSC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 Figure 102 SYNC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471 Figure 103 E1 Pulse Shape at Transmitter Output . . . . . . . . . . . . . . . . . . . . . . . 472 Figure 104 T1 Pulse Shape at the Cross Connect Point . . . . . . . . . . . . . . . . . . . 473 Figure 105 Thermal Behavior of Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474 Figure 106 Input/Output Waveforms for AC Testing . . . . . . . . . . . . . . . . . . . . . . 475 Figure 107 Device Configuration for Power Supply Testing . . . . . . . . . . . . . . . . 476 Figure 108 Protection Circuitry Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 480 Figure 109 Master Clock Frequency Calculator . . . . . . . . . . . . . . . . . . . . . . . . . . 482 Figure 110 External Line Frontend Calculator . . . . . . . . . . . . . . . . . . . . . . . . . . . 483 |
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