IPF13N03LA datasheet(2/11 Pages) INFINEON

Part #	IPF13N03LA

Description	OptiMOS 2 Power-Transistor

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Manufacturer	INFINEON [Infineon Technologies AG]

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IPD13N03LA

IPF13N03LA

IPS13N03LA

IPU13N03LA

Parameter

Symbol Conditions

Unit

min.

typ.

max.

Thermal characteristics

Thermal resistance, junction - case

R thJC

-

3.2

K/W

SMD version, device on PCB

R thJA

minimal footprint

-

75

6 cm

2 cooling area5)

--

50

Electrical characteristics, at T j=25 °C, unless otherwise specified

Static characteristics

Drain-source breakdown voltage

V (BR)DSS V GS=0 V, I D=1 mA

25

-

V

Gate threshold voltage

V GS(th)

V DS=V GS, I D=20 µA

1.2

1.6

2

Zero gate voltage drain current

I DSS

V DS=25 V, V GS=0 V,

T j=25 °C

-

0.1

1

µA

V DS=25 V, V GS=0 V,

T j=125 °C

-

10

100

Gate-source leakage current

I GSS

V GS=20 V, V DS=0 V

-

10

100

nA

Drain-source on-state resistance

R DS(on)

V GS=4.5 V, I D=20 A

-

17.5

21.9

m

Ω

V GS=10 V, I D=30 A

-

10.7

12.8

Gate resistance

R G

-

0.9

-

Ω

Transconductance

g fs

|V DS|>2|I D|R DS(on)max,

I D=30 A

18

36

-

S

5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain

connection. PCB is vertical in still air.

Values

2) Current is limited by bondwire; with anR

thJC=3.2 K/W the chip is able to carry 47 A.

3) See figure 3

4) T

j,max=150 °C and duty cycle D <0.25 for V GS<-5 V

1) J-STD20 and JESD22

Rev. 1.7

page 2

2004-05-24

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IPF13N03LA Datasheet(PDF) 2 Page - Infineon Technologies AG

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