HYB18T256800AF-37 datasheet(11/90 Pages) INFINEON

Part #	HYB18T256800AF-37

Description	256 Mbi t DDR2 SDRAM

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Manufacturer	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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11 / 90 page

HYB18T256400/800/160AF

256Mb DDR2 SDRAM

INFINEON Technologies

Page 11

Rev. 1.02

May 2004

Block Diagram 8Mbit x 8 I/O x 4 Internal Memory Banks

(32Mb x 8 Organisation with 13 Row, 2 Bank and 10 Column External Addresses)

RAS

CAS

CK

CS

WE

CK

Column-Address

Counter/Latch

Mode

10

A0-A12,

BA0, BA1

CKE

15

I/O Gating

DM Mask Logic

Bank0

Memory

Array

(8192x256x32)

Sense Amplifiers

Bank1

Bank2

Bank3

15

8

2

32

COL0,1

DQ0-DQ7,

DM

DQS

Column

Decoder

256

(x32)

Registers

8192

15

1

DQS

CK, CK

DLL

8

Input

Register

1

32

4

32

Data

Mask

Data

CK,

COL0,1

DQS

Generator

1

8

32

Write

FIFO

&

Drivers

CK

8

DQS

1

8

DQS

AP

15

Note: This Functional Block Diagram is intended to facilitate user understanding of the operation of

the device; it does not represent an actual circuit implementation.

Note: DM is a unidirectional signal (input only), but is internally loaded to match the load of the bidi-

rectional DQ and DQS signals.

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HYB18T256800AF-37 Datasheet(PDF) 11 Page - Infineon Technologies AG

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