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SAF-C164SL-6R25M Datasheet(PDF) 11 Page - Infineon Technologies AG |
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SAF-C164SL-6R25M Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 79 page C164CI/SI C164CL/SL Data Sheet 7 V2.0, 2001-05 EA/ VPP 28 I External Access Enable pin. A low level at this pin during and after Reset forces the C164CI to latch the configuration from PORT0 and pin RD, and to begin instruction execution out of external memory. A high level forces the C164CI to latch the configuration from pins RD and ALE, and to begin instruction execution out of the internal program memory. “ROMless” versions must have this pin tied to ‘0’. Note: This pin also accepts the programming voltage for the OTP derivatives. PORT0 P0L.0-7 P0H.0-7 29- 36 37-39, 42-46 IO PORT0 consists of the two 8-bit bidirectional I/O ports P0L and P0H. It is bit-wise programmable for input or output via direction bits. For a pin configured as input, the output driver is put into high-impedance state. In case of an external bus configuration, PORT0 serves as the address (A) and address/data (AD) bus in multiplexed bus modes and as the data (D) bus in demultiplexed bus modes. Demultiplexed bus modes: Data Path Width: 8-bit 16-bit P0L.0 – P0L.7: D0 – D7 D0 – D7 P0H.0 – P0H.7: I/O D8 – D15 Multiplexed bus modes: Data Path Width: 8-bit 16-bit P0L.0 – P0L.7: AD0 – AD7 AD0 – AD7 P0H.0 – P0H.7: A8 – A15 AD8 – AD15 Table 2 Pin Definitions and Functions (cont’d) Symbol Pin No. Input Outp. Function |
Similar Part No. - SAF-C164SL-6R25M |
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