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Q67120-D969 Datasheet(PDF) 10 Page - Infineon Technologies AG |
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Q67120-D969 Datasheet(HTML) 10 Page - Infineon Technologies AG |
10 / 48 page C501 Semiconductor Group 10 1997-04-01 XTAL2 20 18 14 – XTAL2 Output of the inverting oscillator amplifier. XTAL1 21 19 15 – XTAL1 Input to the inverting oscillator amplifier and input to the internal clock generator circuits. To drive the device from an external clock source, XTAL1 should be driven, while XTAL2 is left unconnected. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is divided down by a divide-by-two flip-flop. Minimum and maximum high and low times as well as rise fall times specified in the AC characteristics must be observed. P2.0 – P2.7 24–31 21–28 18–25 I/O Port 2 is a quasi-bidirectional I/O port with internal pull-up resistors. Port 2 pins that have 1s written to them are pulled high by the internal pull-up resistors, and in that state they can be used as inputs. As inputs, port 2 pins being externally pulled low will source current ( I IL, in the DC characteristics) because of the internal pull-up resistors. Port 2 emits the high- order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application it uses strong internal pull-up resistors when issuing 1s. During accesses to external data memory that use 8-bit addresses (MOVX @Ri), port 2 issues the contents of the P2 special function register. *) I = Input O = Output Table 1 Pin Definitions and Functions (cont’d) Symbol Pin Number I/O*) Function P-LCC-44 P-DIP-40 P-MQFP-44 |
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